THS4281DBVT datasheet(29/43 Pages) TI1

29 / 43 page

THS4281

www.ti.com

SLOS432B – APRIL 2004 – REVISED OCTOBER 2015

9 Power Supply Recommendations

9.1 Power-Supply Decoupling Techniques and Recommendations

Power-supply decoupling is a critical aspect of any high-performance amplifier design. Careful decoupling

provides higher quality ac performance. The following guidelines ensure the highest level of performance.

1. Place decoupling capacitors as close to the power-supply inputs as possible, with the goal of minimizing the

inductance.

2. Placement priority should put the smallest valued capacitors closest to the device.

3. Use of solid power and ground planes is recommended to reduce the inductance along power-supply return

current paths (with the exception of the areas underneath the input and output pins as noted below).

4. A bulk decoupling capacitor is recommended (6.8

μF to 22 μF) within 1 inch, and a ceramic (0.1 μF) within

0.1 inch of the power input pins.

NOTE

The bulk capacitor may be shared by other operational amplifiers.

10 Layout

10.1 Layout Guidelines

Achieving optimum performance with a high-frequency amplifier like the THS4281 requires careful attention to

board layout parasitics and external component types. See the EVM layout figures (Figure 76 to Figure 79) in the

Design Tools section.

Recommendations that optimize performance include:

1. Minimize parasitic capacitance to any ac ground for all of the signal I/O pins. Parasitic capacitance on

the output and inverting input pins can cause instability and on the noninverting input, it can react with the

source impedance to cause unintentional band limiting. To reduce unwanted capacitance, a window around

the signal I/O pins should be opened in all of the ground and power planes around those pins. Otherwise,

ground and power planes should be unbroken elsewhere on the board.

2. Minimize the distance (< 0.1 inch) from the power-supply pins to high-frequency, 0.1-

μF decoupling

capacitors. Avoid narrow power and ground traces to minimize inductance. The power-supply connections

should always be decoupled as described above.

3. Careful selection and placement of external components preserves the high-frequency performance

of the THS4281. Resistors should be a low reactance type. Surface-mount resistors work best and allow a

tighter overall layout. Metal-film, axial-lead resistors can also provide good high-frequency performance.

Again, keep the leads and PCB trace length as short as possible. Never use wire-wound type resistors in a

high-frequency application. Because the output pin and inverting input pin are the most sensitive to parasitic

capacitance, always position the feedback and series output resistor, if any, as close as possible to the

output pin. Other network components, such as noninverting input termination resistors, should also be

placed close to the package. Excessively high resistor values can create significant phase lag that can

degrade performance. Keep resistor values as low as possible, consistent with load-driving considerations. It

is suggested that a good starting point for design is to set the Rf to 2 kΩ for low-gain, noninverting

applications. Doing this automatically keeps the resistor noise terms reasonable and minimizes the effect of

parasitic capacitance.

4. Connections to other wideband devices on the board should be made with short direct traces or

through onboard transmission lines. For short connections, consider the trace and the input to the next

device as a lumped capacitive load. Relatively wide traces (50 mils to 100 mils) should be used, preferably

with ground and power planes opened up around them. Low parasitic capacitive loads (< 4 pF) may not need

an R(ISO), because the THS4281 is nominally compensated to operate at unity gain (+1 V/V) with a 2-pF

capacitive load. Higher capacitive loads without an R(ISO) are allowed as the signal gain increases. If a long

trace is required, and the 6-dB signal loss intrinsic to a doubly terminated transmission line is acceptable,

implement a matched impedance transmission line using microstrip or stripline techniques (consult an ECL

design handbook for microstrip and stripline layout techniques). A matching series resistor into the trace from

the output of the THS4281 is used as well as a terminating shunt resistor at the input of the destination

Submit Documentation Feedback

Product Folder Links: THS4281

THS4281DBVT Datasheet(PDF) 29 Page - Texas Instruments

THS4281DBVT Datasheet(HTML) 29 Page - Texas Instruments

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43

Datasheet Download

Link URL