THS4281

SLOS432B – APRIL 2004 – REVISED OCTOBER 2015

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6 Specifications

6.1 Absolute Maximum Ratings

Over operating free-air temperature range (unless otherwise noted).

(1)

MIN

MAX

UNIT

16.5

V

V

±2

V

±100

mA

Continuous power dissipation

See Dissipation Ratings

Table

+150

°C

125°

°C

–65

150

°C

(1)

The absolute maximum ratings under any condition is limited by the constraints of the silicon process. Stresses above these ratings may

cause permanent damage. Exposure to absolute maximum conditions for extended periods may degrade device reliability. These are

stress ratings only, and functional operation of the device at these or any other conditions beyond those specified is not implied.

(2)

The maximum junction temperature for continuous operation is limited by package constraints. Operation above this temperature may

result in reduced reliability and/or lifetime of the device. recommended operating conditions.

6.2 ESD Ratings

VALUE

UNIT

±3500

Charged-device model (CDM), per JEDEC specification JESD22-

Electrostatic discharge

±1500

V

Machine Model (MM)

±100

(1)

JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.

(2)

JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.

6.3 Recommended Operating Conditions

MIN

MAX

UNIT

Dual supply

±1.35

±8.25

V

Single supply

2.7

16.5

6.4 Thermal Information

THS4281

DBV (SOT-23)

D (SOIC)

DGK (VSSOP)

UNIT

5 PINS

8 PINS

8 PINS

154.4

126.6

192.5

°C/W

Junction-to-case (top) thermal resistance

115

69

77.7

°C/W

Junction-to-board thermal resistance

31.4

64.7

112.8

°C/W

Junction-to-top characterization parameter

14.7

20.5

14.6

°C/W

Junction-to-board characterization parameter

31

64.3

111.3

°C/W

Junction-to-case (bottom) thermal resistance

N/A

N/A

N/A

°C/W

(1)

For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application

report, SPRA953.

(2)

This data was taken using the JEDEC standard High-K test PCB.

4

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