Analog Integrated Circuit Device Data

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Freescale Semiconductor

22

BC3770

5.3.10.5 Supplement Mode

When the VSYS voltage falls below the battery voltage while a valid input is attached, the Q4 FET turns On and the Q4 FET gate regulates

the gate drive of Q4 so the minimum VSYS stays at 50 mV below BATREG in the Supplement mode. This prevents oscillation from

entering and exiting Supplement mode. As the discharge current increases, the Q4 gate is regulated with a higher voltage, to reduce

5.3.10.6 Charging Current Reduction in VSYS Overload

When the input current limit is detected in Charge mode by either a system overload or a programmed value is lower than the sum of load

current and charge current, the device reduces the charge current until the limited input current falls below the preset current limit

threshold, and the input voltage rises above the input voltage limit while maintaining the VSYS voltage at 3.4 V.

Although the charge current is reduced to 0 mA, the input power source is still overloaded, and the system voltage starts to drop. Once

the system voltage falls 50 mV below the battery voltage, the device automatically enters the Supplement mode and the battery starts

discharging so the system is supported from the both the input supply and battery. An corresponding interrupt for VSYS overload triggers

via the INTB pin.

5.4

Protection And Diagnosis Features

5.4.1

Input Overvoltage Protection

When the input voltage exceeds the overvoltage protection (OVP) threshold, internal switches immediately turn off and disconnect the

load and the charger from the power source, preventing damage to any downstream components. Simultaneously, the fault flag is

5.4.2

Battery (BAT) Overvoltage Protection

the PWM converter and sets the fault status bit. Simultaneously, the fault flag is asserted, alerting the system. There is a 0.1 V hysteresis

in the internal threshold voltage. If the OVP event over the deglitch time is released, the converter and charging resume.

5.4.3

Reverse Blocking

mode to minimize current drain from BATREG.

5.4.4

Thermal Regulation and Protection

charge current per °C. This drives the charge current down to 0 mA at 130 °C. Since the system load has priority over the battery charging,

the battery charge current is reduced to 0 mA before the input limiter drops the system load current. If the junction temperature rises

beyond 130 °C and then hits 150 °C, the PWM switcher shuts down to allow no input current from the input source. This prevents further

die heating. In this condition, the system output voltage is regulated at BATREG. This internal thermal protection helps to improve device

reliability. The device automatically goes back to normal operation when the die temperature cools down below 130 °C. In these thermal