GS1671 datasheet(4/130 Pages) SEMTECH

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GS1671 HD/SD SDI Integrated Receiver

Data Sheet

53737 - 2

September 2012

4 of 130

Contents

Key Features........................................................................................................................................................1

Errata......................................................................................................................................................................1

Applications.........................................................................................................................................................1

Description...........................................................................................................................................................2

Functional Block Diagram ..............................................................................................................................3

1. Pin Out...............................................................................................................................................................8

1.1 Pin Assignment ..................................................................................................................................8

1.2 Pin Descriptions ................................................................................................................................8

2. Electrical Characteristics ......................................................................................................................... 16

2.1 Absolute Maximum Ratings ....................................................................................................... 16

2.2 Recommended Operating Conditions .................................................................................... 16

2.3 DC Electrical Characteristics ..................................................................................................... 17

2.4 AC Electrical Characteristics ..................................................................................................... 19

3. Input/Output Circuits ............................................................................................................................... 23

4. Detailed Description.................................................................................................................................. 26

4.1 Functional Overview .................................................................................................................... 26

4.2 Serial Digital Input ........................................................................................................................ 27

4.2.1 Integrated Adaptive Cable Equalizer.......................................................................... 27

4.3 Serial Digital Loop-Through Output ........................................................................................ 28

4.4 Serial Digital Reclocker ............................................................................................................... 29

4.4.1 PLL Loop Bandwidth ........................................................................................................29

4.5 External Crystal/Reference Clock ...........................................................................................30

4.6 Lock Detect ...................................................................................................................................... 31

4.6.1 Asynchronous Lock .......................................................................................................... 31

4.6.2 Signal Interruption............................................................................................................ 32

4.7 SMPTE Functionality .................................................................................................................... 32

4.7.1 Descrambling and Word Alignment ........................................................................... 32

4.8 Parallel Data Outputs ................................................................................................................... 33

4.8.1 Parallel Data Bus Buffers.................................................................................................33

4.8.2 Parallel Output in SMPTE Mode ................................................................................... 35

4.8.3 Parallel Output in DVB-ASI Mode ............................................................................... 35

4.8.4 Parallel Output in Data-Through Mode ..................................................................... 36

4.8.5 Parallel Output Clock (PCLK)......................................................................................... 36

4.9 Timing Signal Generator ............................................................................................................. 37

4.9.1 Manual Switch Line Lock Handling ............................................................................ 37

4.9.2 Automatic Switch Line Lock Handling....................................................................... 38

4.10 Programmable Multi-function Outputs ............................................................................... 40

4.11 H:V:F Timing Signal Generation ............................................................................................41

4.11.1 CEA-861 Timing Generation ....................................................................................... 42

4.12 Automatic Video Standards Detection ................................................................................ 48

4.13 Data Format Detection & Indication ..................................................................................... 50

4.14 EDH Detection .............................................................................................................................. 51

4.14.1 EDH Packet Detection ................................................................................................... 51

4.14.2 EDH Flag Detection ........................................................................................................ 51

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