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AD9531 Datasheet(PDF) 76 Page - Analog Devices

Part # AD9531
Description  3-Channel Clock Generator, 24 Outputs
PDF  88 Pages
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Manufacturer  AD [Analog Devices]
Direct Link  http://www.analog.com
Logo AD - Analog Devices

AD9531 Datasheet(HTML) 76 Page - Analog Devices

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AD9531
Data Sheet
PLL3 OUT3_0 Registers—Register 0x0305 to Register 0x0306
Table 70. PLL3 OUT3_0 Register Details
Address
Bits
Bit Name
Description
0x0305
[D7:D4]
Reserved
Reserved.
[D3:D0]
D3A [3:0]
D3A divider, Bit D3 (MSB) to Bit D0 (LSB). The actual channel divide value is twice the value indicated in
this table, due to the fixed divide by 2 that follows D3A. D3A powers down when the OUT3_0 driver
powers down. The value of D3A [3:0] results in the following behavior:
0: divides by 16.
1 to 15: divides by this value.
0x0306
[D7:D4]
Unused
Unused.
D3
3.3 V mode
This bit is only effective when Register 0x0085, Bits[D4:D0] = 00000.
0: 1.8 V CMOS output driver.
1: 3.3 V CMOS output driver.
D2
Reserved
Reserved.
D1
Invert
0: OUT3_0 normal logic output.
1: OUT3_0 inverted logic output.
D0
Power-down
This bit is only effective when Register 0x0085, Bits[D4:D0] = 00000.
0: OUT3_0 driver active.
1: OUT3_0 driver powered down.
PLL3 OUT3_1x Registers—Register 0x0307 to Register 0x0308
Table 71. PLL OUT3_1 Register Details
Address
Bits
Bit Name
Description
0x0307
[D7:D4]
Reserved
Reserved.
[D3:D0]
D3B [3:0]
D3B divider Bit D3 (MSB) to Bit D0 (LSB). The actual channel divide value is twice the
value indicated in this table, due to the fixed divide by 2 that follows D3B. D3B
powers down when the OUT3_1x driver powers down. The value of D3B [3:0] results
in the following behavior:
0: divides by 16.
1 to 15: divides by this value.
0x0308
D7
Unused
Unused.
[D6:D3]
Logic mode [3:0]
Configure OUT3_1 output driver as follows:
0000: disabled.
0001: HSTL.
0010: LVDS.
0011: undefined.
0100: 1.8 V CMOS, OUT3_1P active, OUT3_1N active.
0101: 1.8 V CMOS, OUT3_1P active, OUT3_1N disabled.
0110: 1.8 V CMOS, OUT3_1P disabled, OUT3_1N active.
0111 to 1011: undefined.
1100: 3.3 V CMOS, OUT3_1P active, OUT3_1N active.
1101: 3.3 V CMOS, OUT3_1P active, OUT3_1N disabled.
1110: 3.3 V CMOS, OUT3_1P disabled, OUT3_1N active.
1111: undefined.
[D2:D1]
Polarity [1:0]
Configure OUT3_1 polarity as follows (applies to CMOS only):
00: OUT3_1P normal, OUT3_1N inverted.
01: OUT3_1P normal, OUT3_1N normal.
10: OUT3_1P inverted, OUT3_1N inverted.
11: OUT3_1P inverted, OUT3_1N normal.
D0
Power-down
0: OUT3_1x driver active.
1: OUT3_1x driver powered down.
Rev. 0 | Page 76 of 88



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