AD9531 datasheet(11/88 Pages) AD

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Data Sheet

AD9531

PLL1, Fixed Delay Mode

Table 11.

Parameter

Min

Typ

Max

Unit

Test Conditions/Comments

RELATIVE INPUT/OUTPUT DELAY

External VCXO

fVCXO = 122.88 MHz, fR = 15.36 MHz, fOUT = 15.36 MHz

Group 1A Feedback

From REF1_A/REF1_B to any Group 1A output

Differential Reference

1.60

2.45

3.3 V CMOS Reference

0.82

1.48

2.5 V CMOS Reference

0.64

1.37

Group 1B Feedback

From REF1_A/REF1_B to any Group 1B output

Differential Reference

1.56

2.38

3.3 V CMOS Reference

0.76

1.41

2.5 V CMOS Reference

0.64

1.31

Group 1C Feedback

From REF1_A/REF1_B to any Group 1C output

Differential Reference

1.79

2.60

3.3 V CMOS Reference

0.94

1.58

2.5 V CMOS Reference

0.84

1.41

Internal VCO

fR = 122.88 MHz, fOUT = 122.88 MHz

Group 1A Feedback

From REF1_A/REF1_B to any Group 1A output

Differential Reference

1.09

2.23

3.3 V CMOS Reference

0.36

1.64

2.5 V CMOS Reference

0.27

1.51

Group 1B Feedback

From REF1_A/REF1_B to any Group 1B output

Differential Reference

1.01

2.16

3.3 V CMOS Reference

0.28

1.57

2.5 V CMOS Reference

0.20

1.43

Group 1C Feedback

From REF1_A/REF1_B to any Group 1C output

Differential Reference

1.14

2.32

3.3 V CMOS Reference

0.44

1.70

2.5 V CMOS Reference

0.37

1.56

PLL1 Internal VCO

Table 12.

Parameter

Min

Typ

Max

Unit

Test Conditions/Comments

INTERNAL VCO

Frequency Range

3500

3686

3900

MHz

Gain

MHz/V

PLL1 PFD and Charge Pump

Table 13.

Parameter

Min

Typ

Max

Unit

Test Conditions/Comments

MAXIMUM PFD FREQUENCY

1.8 V Charge Pump (Internal VCO)

Integer Mode

260

MHz

Fractional Mode

MHz

3.3 V Charge Pump (for External VCXO)

MHz

Rev. 0 | Page 11 of 88

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