4

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PI6CDBL401B

Rev.C

03/23/16

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PI6CDBL401B

4-Output Low Power PCIE GEN1-2-3 Buffer

Pin# Pin Name

Type

Description

31

CKPWRGD_PD#

Input

Input notifies device to sample latched inputs and start up on first high asser-

tion. Low enters Power Down Mode, subsequent high assertions exit Power Down

Mode. This pin has internal pull-up resistor.

32

SADR_tri

Input

Tri-level latch to select SMBus Address. See SMBus Address Selection Table.

Pin Descriptions Cont...

16-0064