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MB9B110T Datasheet(PDF) 8 Page - SPANSION

Part # MB9B110T
Description  This document states the current technical specifications regarding
PDF  129 Pages
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Manufacturer  SPANSION [SPANSION]
Direct Link  http://www.spansion.com
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MB9B110T Datasheet(HTML) 8 Page - SPANSION

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D a t a S h e e t
February 10, 2015, MB9B110T-DS706-00016-3v0-E
5
CONFIDENTIAL
 CRC (Cyclic Redundancy Check) Accelerator
The CRC accelerator calculates the CRC which has a heavy software processing load, and achieves a
reduction of the integrity check processing load for reception data and storage.
CCITT CRC16 and IEEE-802.3 CRC32 are supported.
 CCITT CRC16 Generator Polynomial: 0x1021
 IEEE-802.3 CRC32 Generator Polynomial: 0x04C11DB7
 Clock and Reset
[Clocks]
Selectable from five clock sources (2 external oscillators, 2 built-in CR oscillators, and Main PLL).
 Main Clock:
4 MHz to 48 MHz
 Sub Clock:
32.768 kHz
 Built-in high-speed CR Clock: 4 MHz
 Built-in low-speed CR Clock: 100 kHz
 Main PLL Clock
[Resets]
 Reset requests from INITX pin
 Power-on reset
 Software reset
 Watchdog timers reset
 Low-voltage detection reset
 Clock supervisor reset
 Clock Super Visor (CSV)
Clocks generated by built-in CR oscillators are used to supervise abnormality of the external clocks.
 When external clock failure (clock stop) is detected, reset is asserted.
 When external frequency anomaly is detected, interrupt or reset is asserted.
 Low-Voltage Detector (LVD)
This Series includes 2-stage monitoring of voltage on the VCC pins. When the voltage falls below the
voltage set, Low Voltage Detector generates an interrupt or reset.
 LVD1: error reporting via interrupt
 LVD2: auto-reset operation
 Low-Power Consumption Mode
Three Low-Power Consumption modes supported.
 SLEEP
 TIMER
 STOP
 Debug
 Serial Wire JTAG Debug Port (SWJ-DP)
 Embedded Trace Macrocells (ETM).
 Power Supply
Wide range voltage VCC = 2.7 V to 5.5 V



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