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LM98722CCMT/NOPB Datasheet(PDF) 1 Page - Texas Instruments |
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LM98722CCMT/NOPB Datasheet(HTML) 1 Page - Texas Instruments |
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1 / 150 page ![]() LM98722 CCD Timing Generator Analog Front End CCD/CIS Sensor Sensor Drivers Image Processor/ ASIC Data Output SPI Motor Controllers CLK SSCG Product Folder Sample & Buy Technical Documents Tools & Software Support & Community LM98722 SNAS487B – SEPTEMBER 2009 – REVISED MARCH 2015 LM98722 3 Channel, 16-Bit, 45 MSPS Analog Front End with LVDS/CMOS Output, Integrated CCD/CIS Sensor Timing Generator, and Spread Spectrum Clock Generation 1 Features 3 Description The LM98722 is a fully integrated, high performance 1 • LVDS/CMOS Outputs 16-Bit, 45 MSPS signal processing solution for digital • LVDS/CMOS/Crystal Clock Source with PLL color copiers, scanners, and other image processing Multiplication applications. High-speed signal throughput is • Integrated Flexible Spread Spectrum Clock achieved with an innovative architecture utilizing Correlated Double Sampling (CDS), typically Generation employed with CCD arrays, or Sample and Hold • CDS or S/H Processing for CCD or CIS sensors (S/H) inputs (for higher speed CCD or CMOS image • Independent Gain/Offset Correction for Each sensors). The signal paths utilize 8 bit Programmable Channel Gain Amplifiers (PGA), a +/-9-Bit offset correction • Automatic per-Channel Gain and Offset DAC and independently controlled Digital Black Level correction loops for each input. The PGA and offset Calibration DAC are programmed independently allowing unique • Programmable Input Clamp Voltage values of gain and offset for each of the three analog • Flexible CCD/CIS Sensor Timing Generator inputs. The signals are then routed to a 45-MHz high performance analog-to-digital converter (ADC). The 2 Applications fully differential processing channel shows exceptional noise immunity, having a very low noise • Multi-Function Peripherals floor of -74dB. The 16-bit ADC has excellent dynamic • High-speed Currency/Check Scanners performance making the LM98722 transparent in the • Flatbed or Handheld Color Scanners image reproduction chain. • High-speed Document Scanners A very flexible integrated Spread Spectrum Clock • Key Specifications: Generation (SSCG) modulator is included to assist with EM compliance and reduce system costs. – Maximum Input Level: – 1.2-V or 2.4-V Modes (Both with + or - Device Information Polarity Option) ORDER NUMBER PACKAGE BODY SIZE – ADC Resolution: 16-Bit LM98722 TSSOP (56) 14.0 mm x 6.10 mm – ADC Sampling Rate: 45 MSPS – INL: +18/-25 LSB (typ) Simplified Schematic – Channel Sampling Rate: 22.5/22.5/15 MSPS (1ch/2ch/3ch) – PGA Gain Steps: 256 Steps – PGA Gain Range: 0.64 to 8.3x – Analog DAC Resolution: +/-9 Bits – Analog DAC Range: +/-307 mV or +/-614 mV – Digital DAC Resolution: +/-6 Bits – Digital DAC Range: -2048 LSB to + 2016 LSB – SNR: -74dB (at 0dB PGA Gain) – Power Dissipation: 630 mW (LVDS) – Operating Temp: 0 to 70°C – Supply Voltage: 3.3-V Nominal (3.0-V to 3.6-V Range) 1 An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications, intellectual property matters and other important disclaimers. PRODUCTION DATA. |
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