ADC12DL040

SNAS250D – FEBRUARY 2005 – REVISED APRIL 2013

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Single-Ended Operation

Performance with differential input signals is better than with single-ended signals. For this reason, single-ended

operation is not recommended. However, if single ended-operation is required and the resulting performance

degradation is acceptable, one of the analog inputs should be connected to the d.c. mid point voltage of the

driven input. The peak-to-peak differential input signal at the driven input pin should be twice the reference

Because very large input signal swings can degrade distortion performance, better performance with a single-

ended input can be obtained by reducing the reference voltage when maintaining a full-range output. Table 1 and

Table 2 indicate the input to output relationship of the ADC12DL040.

Table 1. Input to Output Relationship – Differential Input

Binary Output

2’s Complement Output

0000 0000 0000

1000 0000 0000

0100 0000 0000

1100 0000 0000

1000 0000 0000

0000 0000 0000

1100 0000 0000

0100 0000 0000

1111 1111 1111

0111 1111 1111

Table 2. Input to Output Relationship – Single-Ended Input

Binary Output

2’s Complement Output

0000 0000 0000

1000 0000 0000

0100 0000 0000

1100 0000 0000

1000 0000 0000

0000 0000 0000

1100 0000 0000

0100 0000 0000

1111 1111 1111

0111 1111 1111

Driving the Analog Inputs

amplifier. The capacitance seen at the analog input pins changes with the clock level, appearing as 8 pF when

the clock is low, and 7 pF when the clock is high.

As the internal sampling switch opens and closes, current pulses occur at the analog input pins, resulting in

voltage spikes at the signal input pins. As a driving amplifier attempts to counteract these voltage spikes, a

damped oscillation may appear at the ADC analog input. Do not attempt to filter out these pulses. Rather, use

amplifiers to drive the ADC12DL040 input pins that are able to react to these pulses and settle before the switch

opens and another sample is taken. The LMH6702 LMH6628, LMH6622 and the LMH6655 are good amplifiers

for driving the ADC12DL040.

To help isolate the pulses at the ADC input from the amplifier output, use RCs at the inputs, as can be seen in

Figure 37 through Figure 39. These components should be placed close to the ADC inputs because the input

pins of the ADC is the most sensitive part of the system and this is the last opportunity to filter that input.

For Nyquist applications the RC pole should be at the ADC sample rate. The ADC input capacitance in the

sample mode should be considered when setting the RC pole. For wideband undersampling applications, the RC

pole should be set at about 1.5 to 2 times the maximum input frequency to maintain a linear delay response.

A single-ended to differential conversion circuit is shown in Figure 39. Table 3 gives resistor values for that circuit

to provide input signals in a range of 1.0V ±0.5V at each of the differential input pins of the ADC12DL040.

Table 3. Resistor Values for Circuit of Figure 39

SIGNAL RANGE

R1

R2

R3

R4

R5, R6

0 - 0.25V

open

0

Ω

124

Ω

1500

Ω

1000

Ω

0 - 0.5V

0

Ω

open

Ω

499

Ω

1500

Ω

499

Ω

±0.25V

100

Ω

698

Ω

100

Ω

698

Ω

499

Ω

22

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