ADT7461ARM datasheet(4/24 Pages) AD

Part #	ADT7461ARM

Description	짹1째C Temperature Monitor with Series Resistance Cancellation

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Manufacturer	AD [Analog Devices]

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ADT7461

SMBus TIMING SPECIFICATIONS

Table 2. SMBus Timing Specifications1

Parameter

Limit at TMIN, TMAX

Unit

Description

fSCLK

400

kHz max

tLOW

4.7

µs min

Clock Low Period, between 10% Points.

tHIGH

µs min

Clock High Period, between 90% Points.

µs max

Clock/Data Rise Time.

300

ns max

Clock/Data Fall Time.

tSU; STA

4.7

µs min

Start Condition Setup Time.

tHD; STA2

µs min

Start Condition Hold Time.

tSU; DAT3

250

ns min

Data Setup Time.

tHD; DAT

300

µs min

Data Hold Time.

tSU; STO4

µs min

Stop Condition Setup Time.

tBUF

4.7

µs min

Bus Free Time between Stop and Start Conditions.

1 Guaranteed by design but not production tested.

2 Time from 10% of SDATA to 90% of SCLK.

3 Time for 10% or 90% of SDATA to 10% of SCLK.

4 Time for 90% of SCLK to 10% of SDATA.

SCLK

SDATA

tLOW

tHD;DAT

tHD;STA

tHIGH

tSU;DAT

STOP START

STOP

START

tSU;STA

tSU;STO

tHD;STA

tBUF

Figure 2. Serial Bus Timing

Rev. 0 | Page 4 of 24

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