ADT7461

Table 12. List of ADT7461 Registers

Read Address (Hex)

Write Address (Hex)

Name

Power-On Default

Not Applicable

Not Applicable

Address Pointer

Undefined

00

Not Applicable

Local Temperature Value

0000 0000 (0×00)

01

Not Applicable

External Temperature Value High Byte

0000 0000 (0×00)

02

Not Applicable

Status

Undefined

03

09

Configuration

0000 0000 (0×00)

04

0A

Conversion Rate

0000 1000 (0×08)

05

0B

Local Temperature High Limit

0101 0101 (0×55) (85°C)

06

0C

Local Temperature Low Limit

0000 0000 (0×00) (0°C)

07

0D

External Temperature High Limit High Byte

0101 0101 (0×55) (85°C)

08

0E

External Temperature Low Limit High Byte

0000 0000 (0×00) (0°C)

Not Applicable

0F

One-Shot

10

Not Applicable

External Temperature Value Low Byte

0000 0000

11

11

External Temperature Offset High Byte

0000 0000

12

12

External Temperature Offset Low Byte

0000 0000

13

13

External Temperature High Limit Low Byte

0000 0000

14

14

External Temperature Low Limit Low Byte

0000 0000

19

19

External THERM Limit

0110 1100 (0×55) (85°C)

20

20

Local THERM Limit

0101 0101 (0×55) (85°C)

21

21

THERM Hysteresis

0000 1010 (0×0A) (10°C)

22

22

Consecutive ALERT

0000 0001 (0×01)

FE

Not Applicable

Manufacturer ID

0100 0001 (0×41)

FF

Not Applicable

Die Revision Code

0101 0001 (0×51)

*Writing to address 0F causes the ADT7461 to perform a single measurement. It is not a data register as such and it does not matter what data is written to it.

SERIAL BUS INTERFACE

Control of the ADT7461 is carried out via the serial bus. The

ADT7461 is connected to this bus as a slave device, under the

control of a master device.

The ADT7461 has an SMBus timeout feature. When this is en-

abled, the SMBus will timeout after typically 25 ms of no activ-

ity. However, this feature is not enabled by default. Bit 7 of the

consecutive alert register (Address = 0×22) should be set to

enable it.

The ADT7461 supports packet error checking (PEC) and its use

is optional. It is triggered by supplying the extra clock for the

PEC byte. The PEC byte is calculated using CRC-8. The frame

check sequence (FCS) conforms to CRC-8 by the polynomial

()

1

1

2

8

+

+

+

=

x

x

x

x

C

Consult the SMBus 1.1 specification for more information

(www.smbus.org).

ADDRESSING THE DEVICE

In general, every SMBus device has a 7-bit device address,

except for some devices that have extended, 10-bit addresses.

When the master device sends a device address over the bus, the

slave device with that address will respond. The ADT7461 is

available with one device address, 0×4C (1001 100b).

The serial bus protocol operates as follows:

1.

The master initiates data transfer by establishing a START

condition, defined as a high-to-low transition on the serial

data line SDATA, while the serial clock line SCLK remains

high. This indicates that an address/data stream will follow.

All slave peripherals connected to the serial bus respond to

the START condition and shift in the next eight bits, con-

sisting of a 7-bit address (MSB first) plus an R/W bit,

which determines the direction of the data transfer, i.e.,

whether data will be written to or read from the slave

device. The peripheral whose address corresponds to the

transmitted address responds by pulling the data line low

during the low period before the ninth clock pulse, known

as the Acknowledge Bit. All other devices on the bus now

remain idle while the selected device waits for data to be

read from or written to it. If the R/W bit is a 0, the master

will write to the slave device. If the R/W bit is a 1, the mas-

ter will read from the slave device.

2.

Data is sent over the serial bus in a sequence of nine clock

pulses, eight bits of data followed by an Acknowledge Bit

from the slave device. Transitions on the data line must

occur during the low period of the clock signal and remain

stable during the high period, since a low-to-high transition

when the clock is high may be interpreted as a STOP signal.

The number of data bytes that can be transmitted over the

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