Unused Input

Input

Output

Input

Unused Input

Output

10

SN54HC00, SN74HC00

SCLS181F – DECEMBER 1982 – REVISED JULY 2016

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Copyright © 1982–2016, Texas Instruments Incorporated

10 Power Supply Recommendations

The power supply can be any voltage between the MIN and MAX supply voltage rating located in Recommended

Operating Conditions.

0.022-µF bypass capacitors for each power pin. It is acceptable to parallel multiple bypass capacitors to reject

different frequencies of noise. A 0.1 µF and a 1 µF are commonly used in parallel. The bypass capacitor must be

installed as close to the power pin as possible for best results.

11 Layout

11.1 Layout Guidelines

When using multiple bit logic devices inputs must never float.

In many cases, functions or parts of functions of digital logic devices are unused, for example, when only two

inputs of a triple-input and gate are used or only 3 of the 4 buffer gates are used. Such input pins must not be left

unconnected because the undefined voltages at the outside connections result in undefined operational states.

Figure 5 specifies the rules that must be observed under all circumstances. All unused inputs of digital logic

devices must be connected to a high or low bias to prevent them from floating. The logic level that must be

applied to any particular unused input depends on the function of the device. Generally they are tied to GND or

part is a transceiver.

11.2 Layout Example

Figure 5. Layout Diagram