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THS789PFD Datasheet(PDF) 6 Page - Texas Instruments |
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THS789PFD Datasheet(HTML) 6 Page - Texas Instruments |
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6 / 34 page ![]() THS789 SLOS776A – SEPTEMBER 2012 – REVISED DECEMBER 2015 www.ti.com 6.5 Electrical Characteristics Typical conditions are at TJ = 55°C and VCC = 3.3 V. PARAMETER TEST CONDITIONS MIN TYP MAX UNIT TDC CHARACTERISTICS Time-measurement precision (LSB) 13.02 ps Measurement accuracy after calibration, mean –800 800 ps Single-event accuracy, one sigma 800 ps Time-measurement temperature coefficient 0.1 ps/°C Time-measurement voltage coefficient ±30 ps/V Event input rate 200 MHz Minimum event pulse duration 250 ps Turnon time (ready to take timestamp) 250 μs MASTER CLOCK CHARACTERISTICS Frequency 200 MHz Duty cycle 0.4 0.6 Jitter 3 ps RMS HIGH-SPEED LVDS INPUTS: MCLK, EVENT, SYNC Differential input voltage 100- Ω termination, line-to-line 200 350 500 mV Common-mode voltage 1.25 V Peak voltage, either input 0.6 1.7 V Input capacitance 1 pF HIGH-SPEED LVDS OUTPUTS: Rdata, Rstrobe, RCLK Differential output voltage 100- Ω termination, line-to-line 250 325 400 mV Common-mode voltage 1.125 1.28 1.375 V Rise time/fall time 20%/80% 250 ps Output resistance 40 Ω TEMPERATURE SENSOR DC CHARACTERISTICS Output voltage TJ = 65°C 1.69 V Output voltage temperature slope 5 mV/°C Max capacitive load 30 pF Max resistive load 10 k Ω OVERTEMPERATURE ALARM DC CHARACTERISTICS Trip point Active-low pulldown 141 °C Leakage current Temperature < trip point 1 μA Output voltage, low Isink = 1 ma 0.2 V OUTPUT INTERFACE TIMING RCLK duty cycle 45% 50% 55% Rdata/Rstrobe to RCLK setup time 300 MHz 1.4 ns Rdata/Rstrobe to RCLK hold time 300 MHz 1.5 ns OPERATING PARAMETERS Coarse counter range 34 bit Coarse counter max time range 14.31 s Result-interface clock 300 MHz Result-interface transfer format 40 bit Result-interface time range –7.158 7.158 s 6 Submit Documentation Feedback Copyright © 2012–2015, Texas Instruments Incorporated Product Folder Links: THS789 |
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