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TMS320C6472ECTZ Datasheet(PDF) 14 Page - Texas Instruments

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Part # TMS320C6472ECTZ
Description  TMS320C6472 Fixed-Point Digital Signal Processor
PDF  269 Pages
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Manufacturer  TI1 [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI1 - Texas Instruments

TMS320C6472ECTZ Datasheet(HTML) 14 Page - Texas Instruments

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TMS320C6472
SPRS612G
– JUNE 2009 – REVISED JULY 2011
www.ti.com
Table 2-2. C6472 Memory Map Summary (continued)
MEMORY BLOCK DESCRIPTION
BLOCK SIZE (BYTES)
HEX ADDRESS RANGE
DSP5 L2 SRAM
608K
15800000 - 15897FFF
Reserved
5M + 416K
15898000 - 15DFFFF
DSP5 L1P SRAM
32K
15E00000 - 15E07FFF
Reserved
992K
15E08000 - 15EFFFFF
DSP5 L1D SRAM
32K
15F00000 - 15F07FFF
Reserved
161M + 992K
15F08000 - 1FFFFFFF
DATA SPACE ON DMA
Reserved
1408M
20000000 - 77FFFFFF
DDR2 EMIF Config
128M
78000000 - 7FFFFFFF
Reserved
1536M
80000000 - DFFFFFFF
CE0-CE1 DDR2 SDRAM
512M
E0000000 - FFFFFFFF
2.4
Boot Mode Sequence
The boot sequence is a process by which the DSP's internal memory is loaded with program and data
sections and the DSP's internal registers are programmed with predetermined values. The boot sequence
is started automatically after each power-on, warm, and system reset. For more details on the initiators of
these resets, see Section 7.7, Reset Controller.
There are several methods by which the memory and register initialization can take place. Each of these
methods is referred to as a boot mode. The boot mode to be used is selected at reset through the
BOOTMODE[3:0] pins.
2.4.1
Boot Modes Supported
The TMS320C6472 has a dedicated Boot Controller, which is responsible for managing the boot process
for single and multiple C64x+ megamodule core boots. There are two types of resets on the C6472
device:
1. Device-level Resets (Global Resets)
– Power-on Reset; initiated by POR
– Chip-level Warm Reset (or Device Reset); initiated by RESET
– System Reset; initiated by a watchdog timeout or emulation
2. C64x+ megamodule-level Resets (Local Resets)
– External C64x+ megamodule selectable LRESET
– Local reset of the C64x+ megamodule initiated by on-chip Reset Controller
– Power Sleep Controller initiated by local C64x+ megamodule reset
After POR and RESET asserted resets, the boot controller selects the boot mode based on the status of
BOOTMODE[3:0] pins. When a system reset occurs, the boot mode used is determined by the
BOOTMODE field in the DEVSTAT register. All possible bootmodes are listed in Table 2-3. For a detailed
explanation of this operation, see the TMS320C645x/C647x Bootloader User's Guide (literature number
SPRUEC6).
Following a device-level reset, each C64x+ megamodule core can set its boot mode choice for
subsequent local resets using the registers BOOTMODE0 through BOOTMODE5 to either immediate boot
mode or host boot mode. The default values of these registers are set to immediate boot mode.
14
Device Overview
Copyright
© 2009–2011, Texas Instruments Incorporated
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