VT8231 datasheet(122/132 Pages) ETC

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VT8231

Preliminary Revision 0.8 October 29, 1999

-116-

Function 5 & 6 Registers - AC97 Audio & Modem Codecs

7HFKQRORJLHV ,QF

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Offset E3-E0 – AC97 Controller Command / Status......RW

31-30 Codec ID

......................................................... RW

00 Select Primary Codec

01 Select Secondary Codec 01

10 Select Secondary Codec 10

11 -reserved-

Reserved

........................................ always reads 0

AC97 Controller Busy ......................................... RO

Primary Codec is ready for a register access

command

AC97 Controller is sending a command to the

primary codec (commands are not accepted)

Reserved

........................................ always reads 0

Secondary Codec 2 Data / Status Valid...........RWC

Not Valid

Valid (OK to Read bits 0-23)

Secondary Codec 1 Data / Status Valid...........RWC

Not Valid

Valid (OK to Read bits 0-23)

Primary Codec Data / Status Valid .................RWC

Not Valid

Valid (OK to Read bits 0-23)

Codec Command Register Read/Write Mode .. RW

Select Codec command register write mode

Select Codec command register read mode

22-16 Codec Command Register Index [7:1] .............. RW

Index of the AC97 codec command register to access

(in the attached codec). Data must be written before

or at the same time as Index as writing to the index

triggers the AC97 controller to access the addressed

codec register over the AC-link interface.

15-0 Codec Command Register Data / Status ........... RW

W Codec Command Register Data

Codec Status Register Data

Offset F3-F0 – SGD Status Shadow ................................. RO

Reserved

........................................ always reads 0

Write Chan 1 SGD STOP Shadow........... (Rx70[2])

Write Chan 1 SGD EOL Shadow............. (Rx70[1])

Write Chan 1 SGD FLAG Shadow .......... (Rx70[0])

Reserved

........................................ always reads 0

Write Chan 0 SGD STOP Shadow........... (Rx60[2])

Write Chan 0 SGD EOL Shadow............. (Rx60[1])

Write Chan 0 SGD FLAG Shadow .......... (Rx60[0])

Reserved

........................................ always reads 0

FM Read Chan SGD STOP Shadow ....... (Rx50[2])

FM Read Chan SGD EOL Shadow ......... (Rx50[1])

FM Read Chan SGD FLAG Shadow ....... (Rx50[0])

Reserved

........................................ always reads 0

3D Read Chan SGD STOP Shadow ......... (Rx40[2])

3D Read Chan SGD EOL Shadow ........... (Rx40[1])

3D Read Chan SGD FLAG Shadow ........ (Rx40[0])

Reserved

........................................ always reads 0

DX3 Read Chan SGD STOP Shadow ...... (Rx30[2])

DX3 Read Chan SGD EOL Shadow ........ (Rx30[1])

DX3 Read Chan SGD FLAG Shadow ..... (Rx30[0])

Reserved

........................................ always reads 0

DX2 Read Chan SGD STOP Shadow ...... (Rx20[2])

DX2 Read Chan SGD EOL Shadow ........ (Rx20[1])

DX2 Read Chan SGD FLAG Shadow ..... (Rx20[0])

Reserved

........................................ always reads 0

DX1 Read Chan SGD STOP Shadow ...... (Rx10[2])

DX1 Read Chan SGD EOL Shadow ........ (Rx10[1])

DX1 Read Chan SGD FLAG Shadow ..... (Rx10[0])

Reserved

........................................ always reads 0

DX0 Read Chan SGD STOP Shadow ...... (Rx00[2])

DX0 Read Chan SGD EOL Shadow ........ (Rx00[1])

DX0 Read Chan SGD FLAG Shadow ..... (Rx00[0])

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