PC87365 datasheet(28/215 Pages) NSC

28 / 215 page

1.0 Signal/Pin Connection and Description (Continued)

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1.4.15

System Wake-Up Control

1.4.16

WATCHDOG Timer (WDT)

Signal

Pin/s

I/O Buffer Type Power Well

Description

LED1

LED2

O12/12

VSB

LED. VSB-powered pins with programmable outputs, each of

which can be used to produce a 0, 0.25, 0.5, 1, 4 Hz waveform for

LED control.

GPIE6-7

58-59

INTS

VSB

General-Purpose Input Event.

GPIOE0-5

23-28

I/O

INTS/

OD6,O3/6

VSB

General-Purpose I/O Event. VSB-powered pins.

GPIS2

INTS

VSB

General-Purpose Input Standby. VSB-powered pin.

GPOS0-1

33-34

OD6,O3/6

VSB

General-Purpose Output Standby. VSB-powered pins.

PSON

O4,OD12

VSB

Power Supply On. Active level (low or high via PSONPOL strap)

instructs the main power supply to turn the power on. PSON

output signal is open-drain when active low and push-pull when

active high.

PWBTIN

INTS

VSB

Power Button In. Active (low) level indicates a user request to

turn the power on or off. This pin has an internal Schmitt-trigger

input buffer and debounce protection of at least 16 ms.

PWBTOUT 33

OD12

VSB

Power Button Out. Active (low) level serves as output to the

chipset power button input.

PWUREQ

OD6

VSB

Power-Up Request. Active (low) level indicates that wake-up

event has occurred and causes the chipset to turn the power

supply on or to exit its current sleep state. The open-drain output

must be pulled up to VSB in order to function during power-off.

RING

INTS

VSB

Telephone Line Ring. Detection of a pulse train on the RING pin

is a wake-up event that can activate the power-up request

(PWUREQ). The pin has a Schmitt-trigger input buffer, powered

by VSB.

SLPS3

INTS

VSB

Sleep State 3, 4 or 5. Input from this pin is assumed to be driven

by the system’s ACPI controller to indicate the system’s power

state.

SLPS5

INTS

VSB

Sleep State 4 or 5. Input from this pin is assumed to be driven by

the system’s ACPI controller to indicate the system’s power state.

Signal

Pin/s

I/O Buffer Type Power Well

Description

WDO

OD6,O3/6

VDD

WATCHDOG Out. Low level indicates that the WATCHDOG Timer

has reached its time-out period without being retriggered.

The output type and an optional pull-up are conﬁgurable.

PC87365 Datasheet(PDF) 28 Page - National Semiconductor (TI)

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