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PC87365 Datasheet(PDF) 76 Page - National Semiconductor (TI) |
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PC87365 Datasheet(HTML) 76 Page - National Semiconductor (TI) |
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76 / 215 page ![]() 2.0 Device Architecture and Configuration (Continued) 76 www.national.com 2.18.3 Fan Speed Control and Monitor Configuration 1 Register This register is reset by hardware to 00h. Location: Index F0h Type: R/W Bit 76543210 Name Fan Speed Invert 1 Enable Fan Speed Control 1 Enable Fan Speed Monitor 1 Enable Fan Speed Invert 0 Enable Fan Speed Control 0 Enable Fan Speed Monitor 0 Enable Reserved TRI-STATE Control Reset 00000000 Bit Description 7 Fan Speed Invert 1 Enable. 0: Disabled (default) 1: Enabled 6 Fan Speed Control 1 Enable. 0: Disabled (default) 1: Enabled 5 Fan Speed Monitor 1 Enable. 0: Disabled (default) 1: Enabled 4 Fan Speed Invert 0 Enable. 0: Disabled (default) 1: Enabled 3 Fan Speed Control 0 Enable. 0: Disabled (default) 1: Enabled 2 Fan Speed Monitor 0 Enable. 0: Disabled (default) 1: Enabled 1 Reserved. 0 TRI-STATE Control. When enabled and the device is inactive, the logical device output pins are in TRI-STATE. 0: Disabled (default) 1: Enabled |
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