STV6888 datasheet(16/46 Pages) STMICROELECTRONICS

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STV6888

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Note 33: Ratio "A/B"of vertical parabola component voltage at tVR=0 versus vertical parabola component voltage at

tVR=TVR.

Note 34: Unsigned value. Polarity selection by

VDyCorPol I2C Bus bit. Refer to section I2C Bus control register map.

7.8 - DC/DC CONTROLLER SECTION

VCC = 12V, Tamb = 25°C

Note 35: A current sink is provided by the BComp output while BOut is disabled:

Note 36: Internal reference related to VRefO. The same values to be found on pin BRegIn, while regulation loop is

stabilized.

Note 37: Only applies to configuration specified in "Test conditions" column, i.e. synchronization of BOut “Off-to-On”

edge with horizontal flyback signal. Refer to chapter "DC/DC controller" for more details.

Note 38: tinh is about 300ns regardless of the H frequency

Symbol

Parameter

Test Conditions

Value

Units

Min.

Typ.

Max.

RB+FB

Ext. resistance applied between

BComp

output and BRegIn input

Ω

AOLG

Open loop gain of error amplifier

on BRegIn input

Low frequency(18)

100

fUGBW

Unity gain bandwidth of error am-

plifier on BRegIn input

(18)

6MHz

IRI

Bias current delivered by regula-

tion input BRegIn

-0.2

µA

IBComp

Output current capability of BComp out-

put.

HBOutEn = "Enable"

HBOutEn = "Disable" (35)

-0.5

0.5

2.0

ABISense

Voltage gain on BISense input

VThrBIsCurr

Threshold voltage on BISense input cor-

responding to current limitation

TBD

2.1

IBISense

Input current sourced by BISense input

-1

µA

tBOn

Conduction time of the power transistor (38)

TH -tinh

IBOut

Output current capability of BOut

output

010

VBOSat

Saturation voltage of the internal output

transistor on BOut

IBOut=10mA

0.25

VBReg

Regulation reference for BRegIn

voltage(36)

VRefO=8V

BREF (Sad03):

x0000000b

x1000000b

x1111111b

3.8

4.9

6.0

tBTrigDel /TH

Delay of BOut “Off-to-On” edge after

middle of flyback pulse, as part of TH

(37)

BOutPh = "0"

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