DS3134 datasheet(125/203 Pages) DALLAS

Part #	DS3134

Description	Chateau Channelized T1 And E1 And HDLC Controller

PDF	203 Pages

Scroll/Zoom	100%

Manufacturer	DALLAS [Dallas Semiconductor]

Direct Link	https://www.maximintegrated.com/en.html

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125 / 203 page

DS3134

125 of 203

Transmit DMA Packet Handling Figure 8.2.1C

Buffer 1

Packet 1

1st Descriptor

(EOF=0/CV=0)

Buffer 2

Packet 1

2nd Descriptor

(EOF=0/CV=0)

Buffer 3

Packet 1

Last Descriptor

(EOF=1/CV=1)

Buffer 1

Packet 2

Last Descriptor

(EOF=1/CV=0)

Buffer 1

Packet 3

1st Descriptor

(EOF=0/CV=0)

Buffer 2

Packet 3

2nd Descriptor

(EOF=0/CV=0)

Buffer 3

Packet 3

Last Descriptor

(EOF=1/CV=1)

Buffer 1

Packet 4

Last Descriptor

(EOF=1/CV=0)

Buffer 1

Packet 5

Last Descriptor

(EOF=1/CV=0)

Buffer 1

Packet 6

1st Descriptor

(EOF=0/CV=0)

Buffer 2

Packet 6

2nd Descriptor

(EOF=0/CV=0)

Buffer 3

Packet 6

Last Descriptor

(EOF=1/CV=0)

PV=1

Next Pending

Descriptor Pointer

stored within the

Packet Descriptor

Last Pending Descriptor Pointer

Next Pending Descriptor Pointer

Next Descriptor Pointer

Start Descriptor Pointer

Next Pending

Descriptor Pointer

stored within the

Packet Descriptor

Transmit DMA Configuration RAM

dmatpf

Packet Chain

Column 1

Packet Chain

Column 2

Packet Chain

Column 3

Packet Chain

Column 4

DS3134 Datasheet(PDF) 125 Page - Dallas Semiconductor

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