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ML620Q151A Datasheet(PDF) 29 Page - LAPIS Semiconductor Co., Ltd. |
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ML620Q151A Datasheet(HTML) 29 Page - LAPIS Semiconductor Co., Ltd. |
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29 / 36 page ![]() FEDL620Q150A-01 ML620Q151A/2A/3A/4A/5A/6A/7A/8A/9A 29/36 AC Characteristics (Synchronous Serial Port) (VDD=1.8 to 5.5V, VSS =0V, Ta=−40 to +105°C, unless otherwise specified) Parameter Symbol Condition Min. Typ. Max. Unit High-speed oscillation stopped 10 ― ― µs SCK input cycle (slave mode) tSCYC During high-speed oscillation 500 ― ― ns SCK output cycle (master mode) tSCYC ― ― SCK (*1) ― sec High-speed oscillation stopped 4 ― ― µs SCK input pulse width (slave mode) tSW During high-speed oscillation 200 ― ― ns SCK output pulse width (master mode) tSW ― SCK (*1) ×0.4 SCK (*1) ×0.5 SCK (*1) ×0.6 sec SOUT output delay time (slave mode) tSD ― ― ― 180 ns SOUT output delay time (master mode) tSD ― ― ― 80 ns SIN input setup time (slave mode) tSS ― 80 ― ― ns SIN input setup time (Master mode) tSS ― 240 ― ― ns SIN input hold time tSH ― 80 ― ― ns *1: Clock period selected by SnCK3–0 of the serial port n mode register (SIOnMOD1) tSD SCKn* SINn* SOUTn *: Indicates the secondary function of the corresponding port. tSD tSS tSH tSW tSW tSCYC |
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