DAC

AS5181

AS5181

Rev. 0.4 01/10

Micross Components reserves the right to change products or specifications without notice.

12

Using the AS5181 for Arbitrary Waveform

Generation

Designing a traditional arbitrary waveform generator

(AWG) requires five major functional blocks (Figure 8a):

clock generator, counter, waveform memory, DAC for wave-

form reconstruction, and output filter. The waveform memory

contains the sequentially stored digital replica of the desired

analog waveforms. This memory shares a common clock with

the DAC.

For each clock cycle, a counter adds one count to the

address for the waveform memory. The memory then loads

the next value to the DAC, which generates an analog output

voltage corresponding to that data value. A DAC output filter

can either be a simple or complex lowpass filter, depending on

the AWG requirements for waveform function and frequen-

cies. The main limitations of the AWG’s flexibility are DAC

resolution and dynamic performance, memory length, clock

frequency, and the filter characteristics.

Although the AS5181 offer high-frequency operation and

excellent dynamics, they are suitable for relaxed requirements

in resolution (10-bit AWGs). To increase an AWG’s high-

frequency accuracy, temperature stability, wide-band tuning,

and past phase-continuous frequency switching, the user may

approach a direct digital synthesis (DDS) AWG (Figure 8b).

This DDS loop supports standard waveforms that are repetitive,

such as sine, square, TTL, and triangular waveforms.

DDS allows for precise control of the data-stream input to

the DAC. Data for one complete output waveform cycle is

sequentially stored in a RAM. As the RAM addresses are

changing, the DAC converts the incoming data bits into a

corresponding voltage waveform. The resulting output signal

frequency is proportional to the frequency rate at which the

RAM addresses are changed.

FIGURES 5 A thru D