Electronic Components Datasheet Search
  English  ▼
ALLDATASHEET.NET

X  

PIC16F1613 Datasheet(PDF) 16 Page - Microchip Technology

Part # PIC16F1613
Description  HIGH-VOLTAGE ICSP PROGRAMMING
PDF  38 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
Manufacturer  MICROCHIP [Microchip Technology]
Direct Link  http://www.microchip.com
Logo MICROCHIP - Microchip Technology

PIC16F1613 Datasheet(HTML) 16 Page - Microchip Technology

Back Button PIC16F1613 Datasheet HTML 12Page - Microchip Technology PIC16F1613 Datasheet HTML 13Page - Microchip Technology PIC16F1613 Datasheet HTML 14Page - Microchip Technology PIC16F1613 Datasheet HTML 15Page - Microchip Technology PIC16F1613 Datasheet HTML 16Page - Microchip Technology PIC16F1613 Datasheet HTML 17Page - Microchip Technology PIC16F1613 Datasheet HTML 18Page - Microchip Technology PIC16F1613 Datasheet HTML 19Page - Microchip Technology PIC16F1613 Datasheet HTML 20Page - Microchip Technology Next Button
Zoom Inzoom in Zoom Outzoom out
 16 / 38 page
background image
PIC12(L)F1612/16(L)F161X
DS40001720C-page 16
Preliminary
 2013-2014 Microchip Technology Inc.
4.2
Low-Voltage Programming (LVP) Mode
The Low-Voltage Programming mode allows devices to be programmed using VDD only, without high voltage. When the
LVP bit of Configuration Word 2 register is set to ‘1’, the low-voltage ICSP programming entry is enabled. To disable the
Low-Voltage ICSP mode, the LVP bit must be programmed to ‘0’. This can only be done while in the High-Voltage Entry
mode.
Entry into the Low-Voltage ICSP Program/Verify modes requires the following steps:
1.
MCLR is brought to VIL.
2.
A 32-bit key sequence is presented on ICSPDAT, while clocking ICSPCLK.
The key sequence is a specific 32-bit pattern, '0100 1101 0100 0011 0100 1000 0101 0000' (more easily
remembered as MCHP in ASCII). The device will enter Program/Verify mode only if the sequence is valid. The Least
Significant bit of the Least Significant nibble must be shifted in first.
Once the key sequence is complete, MCLR must be held at VIL for as long as Program/Verify mode is to be maintained.
For low-voltage programming timing, see Figure 8-8 and Figure 8-9.
Exiting Program/Verify mode is done by no longer driving MCLR to VIL. See Figure 8-8 and Figure 8-9.
Note:
To enter LVP mode, the LSB of the Least Significant nibble must be shifted in first. This differs from entering
the key sequence on other parts.



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38


Datasheet Download

Go To PDF Page


Link URL



Does ALLDATASHEET help your business so far?  [ DONATE ] 

About Alldatasheet   |   Advertisement   |   Contact us   |   Privacy Policy   |   Link to Datasheet    |   Link Exchange   |   Manufacturer List
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com