TABLE 1. IM Bus Programming Codes for LMC1982

Address

Function

Data

Function

(A7–A0)

Selected

01000000

Input Select + Mute

XXXXXX00

INPUT1

XXXXXX01

INPUT2

XXXXXX10

N/A

XXXXXX11

MUTE

01000001

Loudness, Enhanced Stereo

XXXXXX00

Loudness OFF

Enhanced Stereo OFF

XXXXXX01

Loudness ON

Enhanced Stereo OFF

XXXXXX10

Loudness OFF

Enhanced Stereo ON

XXXXXX11

Loudness ON

Enhanced Stereo ON

01000010

Bass

XXXX0000

−12 dB

XXXX0011

−6 dB

XXXX0110

FLAT

XXXX1001

+6 dB

XXXX11XX

+12 dB

01000011

Treble

XXXX0000

−12 dB

XXXX0011

−6 dB

XXXX0110

FLAT

XXXX1001

+6 dB

XXXX11XX

+12 dB

01000100

Left Volume

XX000000

0 dB

XX010100

−40 dB

XX101XXX

−80 dB

XX11XXXX

−80 dB

01000101

Right Volume

XX000000

0 dB

XX010100

−40 dB

XX101XXX

−80 dB

XX11XXXX

−80 dB

01000110

Mode Select

XXXXX100

Left Mono

XXXXX101

Stereo

XXXXX11X

Right Mono

01000111

Read Digital Input 1

XXXXXXD1D0

D0 = Digital Input 1

or

D1 = Digital Input 2

Digital Input 2

on IM Bus

General Information

The LMC1982 is a CMOS/bipolar building block intended for

high fidelity audio signal processing. It is designed for line

level inputs signals (300 mV − 2V) and has a maximum gain

of −0.5 dB. While the LMC1982 is manufactured with CMOS

processing, NPN transistors are used to build low noise op

amps. The combination of CMOS switches, bipolar op amps,

and poly-silicon resistors make it possible to achieve an or-

der of magnitude quality improvement over other bipolar cir-

cuits that use analog multipliers to accomplish gain adjust-

ment. Internal circuits set the volume to minimum, tone

controls to flat, the mute to on, and all other functions off

when power is first applied. Individual left and right volume

controls are software programmed to achieve the stereo bal-

ance function.

Figure 1 shows the connection diagram of a

typical LMC1982 application.

The LMC1982 has internal decoding logic that allows a mi-

croprocessor (µP) or microcontroller (µC) to communicate di-

rectly to the audio control circuitry through an INTERMETAL

(IM) Bus interface. This three-wire interface consists of a

bi-directional DATA line, a Clock (CLK) input line, and an

Identity (ID) line. Address and function selection data (8 bits)

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