© VITESSE SEMICONDUCTOR CORPORATION

Page 1

8/28/00

741 Calle Plano, Camarillo, CA 93012 • 805/388-3700 • FAX: 805/987-5896

VITESSE

SEMICONDUCTOR CORPORATION

Data Sheet

VSC6048

G52335-0, Rev. 4.0

High-Speed Octal

Programmable Timing Generator

Features

VSC6048 Block Diagram

• 100MHz/200MHz Dynamic Reprogram Frequency

for Incrementing and Decrementing

• Internal or External High-Speed Clock Option

• Low Power: 8 Watts, max

• Low Cost 160-Pin PQFP Packaging

• 8 Fully Integrated Timing Generators for ATE

Applications

• 10/5ns Delay Range, 10ps Resolution

• Fully Digital Interface. No Off-Chip DACs or

Trim Components Required

• ± 4 LSB Differential Non-Linearity

DAC_WR

CAL_DAT

Register

SPAN

CAL

DAC

IN0A

IN0B

DIN

TEST[0:9]

Register

Channel 1

Channel 0

Channel 2

Channel 7

Variable

Shift

Register

Input

Interleve

800MHz

Clock

400MHz

Clock

3

Vernier

Delay

Element

Out 0

Calibration

Register

400MHz Clock

800MHz Clock

PLL

Clock Multiplier

Unit

x8, x16

Register

7

7

10

6

CAL_DAT

6

6

ADR[0:2]

DCLK

SHIFT

RCK

RCKN

BYP

FSEL

PLLRST