MPC8240EC datasheet(11/52 Pages) MOTOROLA

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MOTOROLA

MPC8240 Integrated Processor Hardware Specifications

Electrical and Thermal Characteristics

1.4.1.5

Power Characteristics

Table 5 provides power consumption data for the MPC8240.

1.4.2

AC Electrical Characteristics

This section provides the AC electrical characteristics for the MPC8240. After fabrication, functional parts

are sorted by maximum processor core frequency as shown in Table 6 and tested for conformance to the AC

specifications for that frequency. The processor core frequency is determined by the bus (PCI_SYNC_IN)

Table 5. Preliminary Power Consumption

Mode

PCI Bus Clock/Memory Bus Clock

CPU Clock Frequency (MHz)

Unit

Notes

33/66/166

33/66/200

33/100/200

66/100/200

Typical

2.5

2.8

3.0

1, 5

Maximum—FP

2.9

3.3

3.5

1, 2

Maximum—INT

2.6

2.9

3.2

3.3

1, 3

Doze

1.8

1.9

2.1

1, 4, 6

Nap

667

858

1, 4, 6

Sleep

477

762

1, 4, 6

I/O Power Supplies

Mode

Min

Max

Unit

Notes

Typical—OVDD

200

600

7, 8

Typical—GVDD

300

900

7, 9

Notes:

1. The values include VDD, AVDD, AVDD2, and LAVDD but do not include I/O supply power; see Section 1.7.2, “Power

Supply Sizing,” for information on OVDD and GVDD supply power. One DIMM is used for memory loading.

2. Maximum—FP power is measured at VDD = 2.5 V with dynamic power management enabled while running an

entirely cache-resident, looping, floating-point multiplication instruction.

3. Maximum—INT power is measured at VDD = 2.5 V with dynamic power management enabled while running entirely

cache-resident, looping, integer instructions.

4. Power saving mode maximums are measured at VDD = 2.5 V while the device is in doze, nap, or sleep mode.

5. Typical power is measured at VDD = AVDD = 2.5 V, OVDD = 3.3 V where a nominal FP value, a nominal INT value,

and a value where there is a continuous flush of cache lines with alternating ones and zeros on 64-bit boundaries

to local memory are averaged.

6. Power saving mode data measured with only two PCI_CLKs and two SDRAM_CLKs enabled.

7. The typical minimum I/O power values were results of the MPC8240 performing cache resident integer operations

at the slowest frequency combination of 33:66:166 (PCI:Mem:CPU) MHz.

8. The typical maximum OVDD value resulted from the MPC8240 operating at the fastest frequency combination of

66:100:250 (PCI:Mem:CPU) MHz and performing continuous flushes of cache lines with alternating ones and

zeros to PCI memory.

9. The typical maximum GVDD value resulted from the MPC8240 operating at the fastest frequency combination of

66:100:250 (PCI:Mem:CPU) MHz and performing continuous flushes of cache lines with alternating ones and

zeros on 64-bit boundaries to local memory.

10.Power consumption on the PLL supply pins (AVDD and AVDD2) and the DLL supply pin (LAVDD) less than15 mW.

This parameter is guaranteed by design and is not tested.

Freescale Semiconductor, Inc.

For More Information On This Product,

Go to: www.freescale.com

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