PIC16F716 datasheet(52/126 Pages) MICROCHIP

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PIC16F716

DS41206A-page 50

Preliminary

 2003 Microchip Technology Inc.

ADCON1 REGISTER (ADDRESS: 9Fh)

The ADRES register contains the result of the A/D

conversion. When the A/D conversion is complete, the

result is loaded into the ADRES register, the GO/DONE

bit (ADCON0<2>) is cleared and the A/D interrupt flag

bit ADIF is set. The block diagram of the A/D module is

shown in Figure 8-1.

The value that is in the ADRES register is not modified

for any Reset. The ADRES register will contain

unknown data after a Power-on Reset.

After the A/D module has been configured as desired,

the selected channel must be acquired before the

conversion is started. The analog input channels must

have their corresponding TRIS bits selected as an

input. To determine acquisition time, see Section 8.1

“A/D

Acquisition

Requirements”.

After

this

acquisition time has elapsed, the A/D conversion can

be started. The following steps should be followed for

doing an A/D conversion:

Configure the A/D module:

- Configure analog pins/voltage reference/

and digital I/O (ADCON1)

- Select A/D input channel (ADCON0)

- Select A/D conversion clock (ADCON0)

- Turn on A/D module (ADCON0)

Configure A/D interrupt (if desired):

- Clear ADIF bit

- Set ADIE bit

- Set GIE bit

Wait the required acquisition time.

Start conversion:

- Set GO/DONE bit (ADCON0)

Wait for A/D conversion to complete, by either:

- Polling for the GO/DONE bit to be cleared

- Waiting for the A/D interrupt

Read A/D Result register (ADRES), clear bit

ADIF if required.

For the next conversion, go to step 1 or step 2

as required. The A/D conversion time per bit is

defined as TAD. A minimum wait of 2TAD is

required before next acquisition starts.

U-0

R/W-0

—

—PCFG2

PCFG1

PCFG0

bit 7

bit 0

bit 7-3

Unimplemented: Read as '0'

bit 2-0

PCFG2:PCFG0: A/D Port Configuration Control bits

Legend:

R = Readable bit

W = Writable bit

U = Unimplemented bit, read as ‘0’

-n = Value at POR

‘1’ = Bit is set

‘0’ = Bit is cleared

x = Bit is unknown

PCFG2:PCFG0

AN3

RA3

AN2

RA2

AN2

RA1

AN0

RA0

VREF

0x0

AAA

VDD

0x1

VREF

RA3

100

VDD

101

VREF

RA3

11x

DDD

VDD

Legend:

A = Analog input, D = Digital I/O

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