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PC87306 Datasheet(PDF) 100 Page - National Semiconductor (TI) |
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PC87306 Datasheet(HTML) 100 Page - National Semiconductor (TI) |
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100 / 110 page ![]() 120 Electrical Characteristics (Continued) 1228 DMA Timing 12281 FDC Symbol Parameter Min Max Units tKI FDACK Inactive Pulse Width 25 ns tKK FDACK Active Pulse Width 65 ns tKQ FDACK Active Edge to FDRQ Inactive 65 ns tQK FDRQ to FDACK Active Edge 10 ns tQP FDRQ Period (except Non-Burst DMA) (Note 3) 8 x tDRP m s tQQ FDRQ Inactive Non-Burst Pulse Width 300 400 ns tQR FDRQ to RD or WR Active 15 ns tQW FDRQ to End of RD WR (Notes 2 3) (8xtDRP) b(16xtICP) m s (FDRQ Service Time) tQT FDRQ to TC Active (Notes 2 3) (8 x tDRP) b(16xtICP) m s (FDRQ Service Time) tRQ RD WR Active Edge to FDRQ Inactive 65 ns (Note 1) tTQ TC Active Edge to FDRQ Inactive 75 ns tTT TC Active Pulse Width 50 ns Note 1 The active edge of RD or WR and TC is recognized only when FDACK is active Note 2 Values shown are with the FIFO disabled or with FIFO enabled and THRESH e 0 For nonzero values of THRESH add (THRESHx8xtDRP) to the values shown Note 3 tDRP and tICP are defined in Table 12-1 TLC12379 – 79 FIGURE 12-11 FDC DMA Timing 100 |
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