PC87360 datasheet(73/168 Pages) NSC

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3.0 System Wake-Up Control (SWC) (Continued)

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After the wake-up mode is determined for all events, each one of them is fed into a dedicated detector that determines when

this event is active, according to predetermined (either fixed or programmable) criteria. A set of dedicated registers is used

to determine the wake-up criteria, including the CEIR address and the keyboard sequence.

Two Wake-Up Events Status registers (WK_STSn) hold a Status bit for each of the 16 events.

Six Wake-Up Events Routing Control register s (WK_ENn WK_SMIENn and WK_IRQENn) hold three Routing Enable bits

for each of the 16 events, to allow selective routing of these events to PWUREQ, SMI and/or the assigned SWC interrupt

request (IRQ) channel.

Upon detection of any active event, the corresponding Status bit is set to 1, regardless of any Routing Enable bit. If both the

Status bit and a Routing Enable bit corresponding to a specific event are set to 1 (no matter in what order), the output pin

corresponding to that Routing Enable bit is asserted. The Status bit is deasserted by writing 1 to it. Writing 0 to a Routing

Enable bit of an event prevents it from issuing the corresponding system notification, but does not affect the Status bit. Figure

8 show the routing scheme of detected wake-up events to the various means of system notification.

Figure 8. Wake-Up Events Routing Scheme

To enable the assertion of SMI by detected wake-up events, it is necessary to either select the SMI function on a device pin

or route it to an interrupt request channel via the device’s configuration registers.

Event i

Detection

WK_SMIENn.i

WK_IRQENn.i

WK_ENn.i

Wake-Up Event i

From Wake-Up

PWUREQ

SMI

IRQ

Event

Routing

Logic

WK_STSn.i

Extesion Logic

PC87360 Datasheet(PDF) 73 Page - National Semiconductor (TI)