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PC87360 Datasheet(PDF) 99 Page - National Semiconductor (TI)

[Old version datasheet] Texas Instruments acquired National semiconductor.
Part # PC87360
Description  128-Pin LPC SuperI/O with Protection and Extensive GPIO Support
PDF  168 Pages
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Manufacturer  NSC [National Semiconductor (TI)]
Direct Link  http://www.national.com
Logo NSC - National Semiconductor (TI)

PC87360 Datasheet(HTML) 99 Page - National Semiconductor (TI)

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3.0 System Wake-Up Control (SWC) (Continued)
99
www.national.com
3.4.28
Standby General-Purpose I/O (SBGPIO) Register Overview
The SWC can be used to operate up to 8 VSB-powered general-purpose input/output (GPIO), input (GPI) pins, all of which
support event detection. These are as follows:
q
GPIOE0-5 are GPIO pins.
q
GPIE6,7 are GPI pins.
For programming convenience, these pins are associated with an SBGPIO port. Specifically, GPIE0-5 and GPIE6,7 are as-
sociated with bits 0 to 7 of SBGPIO port 0, respectively.
Table 39 provides a summary of the SBGPIO pin-to-port assignment and pin types.
Table 39. SBGPIO Pin Types and Associated Port
An SBGPIO port is structured as an 8-bit port, based on eight pins. It features:
• Software capability to manipulate and read pin levels
• Controllable system notification by several means based on the pin level or level transition
• Ability to capture and manipulate events and their associated status
• Back-drive protected pins.
SBGPIO port operation is associated with two sets of registers:
• Pin configuration registers, mapped in the SWC register bank 3. These registers are used to statically set up the log-
ical behavior of each pin. There is one 8-bit register for each SBGPIO pin.
• Two 8-bit runtime registers: SBGPIO Data Out (SBGPDO) and SBGPIO Data In (SBGPDI). These registers are
mapped in the SWC device I/O space (determined by the base address registers in the SWC Device Configuration).
They are used to manipulate and/or read the pin values. Each runtime register corresponds to the 8-pin port de-
scribed above (see Table 39).
Each SBGPIO pin is associated with up to six configuration bits and the corresponding bit slice of the two runtime registers,
as shown in Figure 10.
The SBGPIO port has basic as well as enhanced functionality. Basic functionality includes the manipulation and reading of
the SBGPIO pins, as described in Section . Enhanced functionality includes event detection, as described in
Event Detec-
tion.
Pin(s)
Port
Type
Event
Detection
GPIOE0-5
0
I/O
Yes
GPIE6,7
0
I
Yes



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