SPC563M64L5 datasheet(28/48 Pages) STMICROELECTRONICS

28 / 48 page

Device overview

SPC563Mxx

28/48

Doc ID 13850 Rev 6

The eMIOS provides the following features:

●

16 channels (24-bit timer resolution)

●

For compatibility with other family members selected channels and timebases are

implemented:

–

Channels 0 to 6, 8 to 15, and 23

–

Timebases A, B and C

●

Channels 1, 3, 5 and 6 support modes:

–

General Purpose Input/Output (GPIO)

–

Single Action Input Capture (SAIC)

–

Single Action Output Compare (SAOC)

●

Channels 2, 4, 11 and 13 support all the modes above plus:

–

Output Pulse Width Modulation Buffered (OPWMB)

●

Channels 0, 8, 9, 10, 12, 14, 15, 23 support all the modes above plus:

–

Input Period Measurement (IPM)

–

Input Pulse Width Measurement (IPWM)

–

Double Action Output Compare (set flag on both matches) (DAOC)

–

Modulus Counter Buffered (MCB)

–

Output Pulse Width and Frequency Modulation Buffered (OPWFMB)

●

Three 24-bit wide counter buses

–

Counter bus A can be driven by channel 23 or by the eTPU2 and all channels can

use it as a reference

–

Counter bus B is driven by channel 0 and channels 0 to 6 can use it as a reference

–

Counter bus C is driven by channel 8 and channels 8 to 15 can use it as a

reference

●

Shared time bases with the eTPU2 through the counter buses

●

Synchronization among internal and external time bases

3.3.13

eTPU2

The eTPU2 is an enhanced co-processor designed for timing control. Operating in parallel

with the host CPU, eTPU2 processes instructions and real-time input events, performs

output waveform generation, and accesses shared data without host intervention.

Consequently, for each timer event, the host CPU setup and service times are minimized or

eliminated. A powerful timer subsystem is formed by combining the eTPU2 with its own

instruction and data RAM. High level assembler/compiler and documentation allows

customers to develop their own functions on the eTPU2.

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