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HT45F3W Datasheet(PDF) 10 Page - Holtek Semiconductor Inc |
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HT45F3W Datasheet(HTML) 10 Page - Holtek Semiconductor Inc |
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10 / 167 page ![]() Rev. 1.50 10 De�e��e� 01� �01� Rev. 1.50 11 De�e��e� 01� �01� HT45F3W R-Type Blood Pressure Meter Flash MCU HT45F3W R-Type Blood Pressure Meter Flash MCU Pin Name Function OPT I/T O/T Description PB3/S1CK/ TP�_0/AN3 PB3 PBPU ST CMOS Gene�al pu�pose I/O. Registe� ena�led pull-high. If the pull-high is ena�led� the pin will �e �onne�ted via a �esisto� to VOCHP. (It is �e�o��ended that the �ha�ge pu�p is ena�led to p�event leakage.) S1CK SPI1C0 ST — SPI1 Se�ial Clo�k TP�_0 — ST CMOS TM� output AN3 ADCR AN — A/D �hannel 3 PB4 PB4 PBPU ST CMOS Gene�al pu�pose I/O. Registe� ena�led pull-high. PB5/AUD PB5 PBPU ST CMOS Gene�al pu�pose I/O. Registe� ena�led pull-high. AUD — — CMOS Audio DAC output PC0/INT1/ TCK1 PC0 PCPU ST CMOS Gene�al pu�pose I/O. Registe� ena�led pull-high. If the pull-high is ena�led� the pin will �e �onne�ted via a �esisto� to VOCHP. (It is �e�o��ended that the �ha�ge pu�p is ena�led to p�event leakage.) INT1 — ST — Exte�nal Inte��upt 1 TCK1 TM1C0 ST — TM1 input PC1/SCKO/ TP1_1 PC1 PCPU ST CMOS Gene�al pu�pose I/O. Registe� ena�led pull-high. If the pull-high is ena�led� the pin will �e �onne�ted via a �esisto� to VOCHP. (It is �e�o��ended that the �ha�ge pu�p is ena�led to p�event leakage.) SCKO SCKOC — CMOS SCK output f�equen�y pin TP1_1 — ST CMOS TM1 output PC�/S0CS/ TP1_0 PC� PCPU ST CMOS Gene�al pu�pose I/O. Registe� ena�led pull-high. If the pull-high is ena�led� the pin will �e �onne�ted via a �esisto� to VOCHP. (It is �e�o��ended that the �ha�ge pu�p is ena�led to p�event leakage.) S0CS SPI0C0 ST — SPI0 Slave Sele�t TP1_0 — ST CMOS TM1 output PC3/S0CK/ TCK0 PC3 PCPU ST CMOS Gene�al pu�pose I/O. Registe� ena�led pull-high. If the pull-high is ena�led� the pin will �e �onne�ted via a �esisto� to VOCHP. (It is �e�o��ended that the �ha�ge pu�p is ena�led to p�event leakage.) S0CK SPI0C0 ST — SPI0 Se�ial Clo�k TCK0 TM0C0 ST — TM0 input PC4/S0DI/ TP0_1 PC4 PCPU ST CMOS Gene�al pu�pose I/O. Registe� ena�led pull-high. If the pull-high is ena�led� the pin will �e �onne�ted via a �esisto� to VOCHP. (It is �e�o��ended that the �ha�ge pu�p is ena�led to p�event leakage.) S0DI SPI0C0 ST — SPI0 Data input TP0_1 — ST CMOS TM0 output PC5/S0DO/ TP0_0 PC5 PCPU ST CMOS Gene�al pu�pose I/O. Registe� ena�led pull-high. If the pull-high is ena�led� the pin will �e �onne�ted via a �esisto� to VOCHP. (It is �e�o��ended that the �ha�ge pu�p is ena�led to p�event leakage.) S0DO SPI0C0 — CMOS SPI0 Data output TP0_0 — ST CMOS TM0 output PC�/CHPC� PC� PCPU ST CMOS Gene�al pu�pose I/O. Registe� ena�led pull-high. CHPC� — — — Capa�ito� �onne�ted �etween CHPC1 and CHPC� PD0/SEG0~ PD7/SEG7 PDn PDPU ST CMOS Gene�al pu�pose I/O. Registe� ena�led pull-high. SEGn SEGCR — SEG LCD SEG0~SEG7 output |
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