R5F11BBC datasheet(12/143 Pages) RENESAS

12 / 143 page

RL78/G1F

1. OUTLINE

R01DS0246EJ0110 Rev. 1.10

Page 12 of 140

Aug 12, 2016

1.6

Outline of Functions

Caution

This outline describes the functions at the time when Peripheral I/O redirection register 0, 1

(PIOR0, 1) are set to 00H.

(1/2)

Note

This is about 4.5 KB when the self-programming function and data flash function are used (For details, see CHAPTER 3

in the RL78/G1F User’s Manual).

Item

24-pin

32-pin

36-pin

48-pin

64-pin

R5F11B7x

(x = C, E)

R5F11BBx

(x = C, E)

R5F11BCx

(x = C, E)

R5F11BGx

(x = C, E)

R5F11BLx

(x = C, E)

Code flash memory (KB)

32, 64

Data flash memory (KB)

RAM (KB)

5.5 Note

Address space

1 MB

Main system

clock

High-speed system

clock

X1 (crystal/ceramic) oscillation, external main system clock input (EXCLK)

HS (high-speed main) mode: 1 to 20 MHz (VDD = 2.7 to 5.5 V),

HS (high-speed main) mode: 1 to 16 MHz (VDD = 2.4 to 5.5 V),

LS (low-speed main) mode: 1 to 8 MHz (VDD = 1.8 to 2.7 V),

LV (low-voltage main) mode: 1 to 4 MHz (VDD = 1.6 to 1.8 V)

High-speed on-chip

oscillator clock (fIH)

HS (high-speed main) mode: 1 to 32 MHz (VDD = 2.7 to 5.5 V),

HS (high-speed main) mode: 1 to 16 MHz (VDD = 2.4 to 5.5 V),

LS (low-speed main) mode:

1 to 8 MHz (VDD = 1.8 to 5.5 V),

LV (low-voltage main) mode: 1 to 4 MHz (VDD = 1.6 to 5.5 V)

Subsystem clock

—

XT1 (crystal) oscillation, external subsystem clock input

(EXCLKS) 32.768 kHz

Low-speed on-chip oscillator clock

15 kHz (TYP.): VDD = 1.6 to 5.5 V

General-purpose register

8 bits

× 32 registers (8 bits × 8 registers × 4 banks)

Minimum instruction execution time

0.03125

μs (High-speed on-chip oscillator clock: fIH = 32 MHz operation)

0.05

μs (High-speed system clock: fMX = 20 MHz operation)

—30.5

μs (Subsystem clock: fSUB = 32.768 kHz operation)

Instruction set

• Data transfer (8/16 bits)

• Adder and subtractor/logical operation (8/16 bits)

• Multiplication (8 bits

× 8 bits, 16 bits × 16 bits), Division (16 bits ÷ 16 bits, 32 bits ÷ 32 bits)

• Multiplication and Accumulation (16 bits

× 16 bits + 32 bits)

• Rotate, barrel shift, and bit manipulation (Set, reset, test, and Boolean operation), etc.

I/O port

Total

CMOS I/O

(N-ch O.D. output

[VDD withstand

voltage]: 10)

(N-ch O.D. output

[VDD withstand

voltage]: 12)

(N-ch O.D. output

[VDD withstand

voltage]: 10)

(N-ch O.D. output

[VDD withstand

voltage]: 12)

(N-ch O.D. output

[VDD withstand

voltage]: 12)

CMOS input

CMOS output

—

N-ch open-drain I/O (6

V tolerance)

——

Timer

16-bit timer

9 channels

(TAU: 4 channels, Timer RJ: 1 channel, Timer RD: 2 channels (with PWMOPA), Timer RX: 1 channel,

Timer RG: 1 channel)

Watchdog timer

1 channel

Real-time clock (RTC)

1 channel

12-bit interval timer

1 channel

Timer output

Timer outputs:

13 channels

PWM outputs:

8 channels

Timer outputs:

16 channels

PWM outputs:

9 channels

RTC output

—

• 1 Hz (subsystem clock: fSUB = 32.768 kHz)

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