OPA838IDBVT datasheet(21/41 Pages) TI1

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RF 20

NŸ

RG 4.02

NŸ

RG 4.02

VOUT

VEE

VCC

VEE

VCC

V1 2.5

V2 2.5

Bias current

cancellation with

resistor noise

filtering

Inverting with

High Rf values

CG 5 pF

RM 3.24

NŸ

C1 10n

Input

CF 1.2 pF

Frequency (Hz)

10k

100k

10M

100M

D063

RF = 1 k

RF = 2 k

RF = 5 k

RF = 10 k

RF = 20 k

OPA838

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Feature Description (continued)

a fixed target gain), there is a loss of phase margin as the impedance that drives the inverting input capacitance

brings in an added loop pole at lower frequencies. Figure 63 shows this at a gain of 6 V/V with increasing RF

values. This noninverting test shows more peaking as the RF values increase due to the 1.3-pF

common-mode input capacitance at the inverting input. The TINA simulation model gives excellent prediction of

these effects.

Figure 63. Frequency Response With Various Feedback Resistor Values

Operating the OPA838 in inverting mode with higher RF values increases response peaking due to the loss of

phase margin effect. In the inverting case, a pair of capacitors can flatten the response at the cost of lower

closed-loop bandwidth. Figure 64 shows an example with a 20-kΩ RF value at an inverting gain of –5 V/V (noise

gain = 6 V/V) with optional capacitors (CF and CG). Figure 64 shows optional bias current cancellation elements

on the noninverting input. The total resistance value matches the parallel combination of RG || RF, which reduces

the DC output error term due to bias current to IOS × RF. The 10-nF capacitor is added across the larger part of

this bias current canceling resistance to filter noise and the 20 Ω is split out to isolate the capacitor self

resonance from the noninverting input. Figure 65 shows the small signal response shape with and without these

capacitors. The feedback capacitor (CF), is selected to set a desired closed-loop bandwidth with RF. CG is added

to ground to shape the noise gain up over frequency to be greater than or equal to 6 V/V at higher frequencies.

In this example, that higher frequency noise gain is 1 + 6.3 / 1.2 = 6.25 V/V, adding the 1.3-pF device common-

mode capacitance to the external 5 pF. Using the capacitors to set the feedback ratio removes the pole produced

in the feedback driving from purely resistive source to the inverting parasitic capacitance.

Figure 64. G = –5 V/V With Optional Compensation

OPA838IDBVT Datasheet(PDF) 21 Page - Texas Instruments

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