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AT49BV802AT Datasheet(PDF) 24 Page - ATMEL Corporation |
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AT49BV802AT Datasheet(HTML) 24 Page - ATMEL Corporation |
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24 / 29 page ![]() 24 AT49BV802A(T) 3405C–FLASH–9/04 Vendor Specific Extended Query 41h 82h 0050h “P” 42h 84h 0052h “R” 43h 86h 0049h “I” 44h 88h 0031h Major version number, ASCII 45h 8Ah 0030h Minor version number, ASCII 46h 8Ch 0087h Bit 0 – chip erase supported, 0 – no, 1 – yes Bit 1 – erase suspend supported, 0 – no, 1 – yes Bit 2 – program suspend supported, 0 – no, 1 – yes Bit 3 – simultaneous operations supported, 0 – no, 1 – yes Bit 4 – burst mode read supported, 0 – no, 1 – yes Bit 5 – page mode read supported, 0 – no, 1 – yes Bit 6 – queued erase supported, 0 – no, 1 – yes Bit 7 – protection bits supported, 0 – no, 1 – yes 47h 8Eh 0000h (top) or 0001h (bottom) Bit 8 – top (“0”) or bottom (“1”) boot block device undefined bits are “0” 48h 90h 0000h Bit 0 – 4-word linear burst with wrap around, 0 – no, 1 – yes Bit 1 – 8-word linear burst with wrap around, 0 – no, 1 – yes Bit 2 – continuos burst, 0 – no, 1 – yes Undefined bits are “0” 49h 92h 0000h Bit 0 – 4-word page, 0 – no, 1 – yes Bit 1 – 8-word page, 0 – no, 1 – yes Undefined bits are “0” 4Ah 94h 0080h Location of protection register lock byte, the section’s first byte 4Bh 96h 0003h # of bytes in the factory prog section of prot register – 2*n 4Ch 98h 0003h # of bytes in the user prog section of prot register – 2*n Table 1. Common Flash Interface Definition for AT49BV802A(T) (Continued) Address [x16 Mode] Address [x8 Mode] Data Comments |
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