AR0141CS

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45

Power−Up Sequence

The recommended power−up sequence for the

AR0141CS is shown in Figure 49. The available power

2. After 100

supply

3. After 100

4. After 100

μs, turn on VDD power supply

5. After 100

μs, turn on VDD_SLVS power supply

6. After the last power supply is stable, enable

EXTCLK

7. Assert RESET_BAR for at least 1 ms. The parallel

interface will be tri−stated during this time

8. Wait 1800 EXTCLKs for internal initialization

into software standby

9. Initiate load of OTPM data by setting R0x304A =

0x0010

10. Wait for 185135 EXTCLKs for a full OTPM

loading

11. Configure PLL, output, and image settings to

desired values

12. Wait 1ms for the PLL to lock

13. Set streaming mode (R0x301A[2] = 1)

Figure 49. Power Up

t0

t1

t2

t3

t4

tx

t5

t6

t7

RESET_BAR

EXTCLK

Hard

Reset

Internal

Initialization

Software

Standby

R0x304A

= 0x0010

OTPM

loading

Initialization

Setting

loading

PLL

Lock

Streaming

Table 36.

POWER−UP SEQUENCE

Definition

Symbol

Minimum

Typical

Maximum

Unit

t0

0

100

–

μs

t1

0

100

–

μs

t2

0

100

–

μs

t3

0

100

–

μs

Xtal Settle Time

tx

–

30 (Note 1)

–

ms

Hard Reset

t4

1 (Note 2)

–

–

ms

Internal Initialization

t5

1800

–

–

EXTCLK

OTPM Loading

t6

185135

–

–

EXTCLK

PLL Lock Time

t7

1

–

–

ms

1. Xtal settling time is component−dependent, usually taking about 10 – 100 ms.

2. Hard reset time is the minimum time required after power rails are settled. In a circuit where Hard reset is held down by RC circuit, then the

RC time must include the all power rail settle time and Xtal settle time.

current draw on this supply.