LAN9220 datasheet(37/142 Pages) MICROCHIP

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DS00002417A-page 37

LAN9220

3.10.2.3

Power Management Event Indicators

Figure 3-18 is a simplified block diagram of the logic that controls the external PME, and internal pme_interrupt signals.

The pme_interrupt signal is used to set the PME_INT status bit in the INT_STS register, which, if enabled, will generate

a host interrupt upon detection of a power management event. The PME_INT status bit in INT_STS will remain set until

the internal pme_interrupt signal is cleared by clearing the WUPS bits, or by clearing the corresponding WOL_EN or

ED_EN bit. After clearing the internal pme_interrupt signal, the PME_INT status bit may be cleared by writing a ‘1’ to

this bit in the INT_STS register. It should be noted that the LAN9220 can generate a host interrupt regardless of the

state of the PME_EN bit, or the external PME signal.

The external PME signal can be setup for pulsed, or static operation. When the PME_IND bit in the PMT_CTRL register

is set to a ‘1’, the external PME signal will be driven active for 50ms upon detection of a wake-up event. When the

PME_IND bit is cleared, the PME signal will be driven continuously upon detection of a wake-up event. The PME signal

is deactivated by clearing the WUPS bits, or by clearing the corresponding WOL_EN or ED_EN bit. The PME signal can

also be deactivated by clearing the PME_EN bit.

TABLE 3-10:

POWER MANAGEMENT STATES

Device Block

(Normal Operation)

(WOL)

(Energy Detect)

PHY

Full ON

Energy Detect Power-Down

MAC Power

Management

Full ON

RX Power Mgmt. Block

OFF

MAC and Host

Interface

Full ON

OFF

Internal Clock

Full ON

OFF

KEY

CLOCK ON

BLOCK DISABLED – CLOCK ON

FULL OFF

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