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LAN9220 Datasheet(PDF) 5 Page - Microchip Technology |
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LAN9220 Datasheet(HTML) 5 Page - Microchip Technology |
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5 / 142 page ![]() 2006-2017 Microchip Technology Inc. DS00002417A-page 5 LAN9220 1.1 Block Diagram The Microchip LAN9220 integrated 10/100 MAC/PHY controller is a peripheral chip that performs the function of trans- lating parallel data from a host controller into Ethernet packets. The LAN9220 Ethernet MAC/PHY controller is designed and optimized to function in an embedded environment. All communication is performed with programmed I/O transac- tions using the simple SRAM-like host interface bus. The diagram shown above, describes a typical system configuration of the LAN9220 in a typical embedded environ- ment. The LAN9220 is a general purpose, platform independent, Ethernet controller. The LAN9220 consists of four major func- tional blocks. The four blocks are: • 10/100 Ethernet PHY • 10/100 Ethernet MAC • RX/TX FIFOs • Host Bus Interface (HBI) FIGURE 1-1: SYSTEM BLOCK DIAGRAM Microprocessor/ Microcontroller LAN9220 Magnetics Ethernet System Peripherals System Memory EEPROM (Optional) LEDS/ GPIO 25MHz XTAL System Bus |
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