LAN9220 datasheet(94/142 Pages) MICROCHIP

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LAN9220

DS00002417A-page 94

 2006-2017 Microchip Technology Inc.

Hash/Perfect Filtering Mode (HPFILT). When reset (0), the LAN9220 will implement a perfect

address filter on incoming frames according the address specified in the MAC address register.

When set (1), the address check Function does imperfect address filtering of multicast incoming

frames according to the hash table specified in the multicast hash table register.

If the Hash Only Filtering mode (HO) bit is set (1), then the physical (IA) are imperfect filtered too. If

the Hash Only Filtering mode (HO) bit is reset (0), then the IA addresses are perfect address filtered

according to the MAC Address register

Late Collision Control (LCOLL). When set, enables retransmission of the collided frame even after

the collision period (late collision). When reset, the MAC disables frame transmission on a late

collision. In any case, the Late Collision status is appropriately updated in the Transmit Packet status.

Disable Broadcast Frames (BCAST). When set, disables the reception of broadcast frames. When

reset, forwards all broadcast frames to the application.

Note:

When wake-up frame detection is enabled via the WUEN bit of the WUCSR—Wake-up Con-

trol and Status Register, a broadcast wake-up frame will wake-up the device despite the

state of this bit.

Disable Retry (DISRTY). When set, the MAC attempts only one transmission. When a collision is

seen on the bus, the MAC ignores the current frame and goes to the next frame and a retry error is

reported in the Transmit status. When reset, the MAC attempts 16 transmissions before signaling a

retry error.

Reserved

Automatic Pad Stripping (PADSTR). When set, the MAC strips the pad field on all incoming frames,

if the length field is less than 46 bytes. The FCS field is also stripped, since it is computed at the

transmitting station based on the data and pad field characters, and is invalid for a received frame

that has had the pad characters stripped. Receive frames with a 46-byte or greater length field are

passed to the Application unmodified (FCS is not stripped). When reset, the MAC passes all incoming

frames to the host unmodified.

Note:

When PADSTR is enabled, the RX Checksum Offload Engine must be disabled (bit 0

(RXCOE_EN) of the COE_CR—Checksum Offload Engine Control Register) and vice versa.

These functions cannot be enabled simultaneously.

Bits

Description

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