MB90347CEPMC datasheet(60/93 Pages) CYPRESS

60 / 93 page

Document Number: 002-04498 Rev. *A

Page 59 of 92

MB90340E Series

11.4.3 Power On Reset

(TA  40°C to 105°C, VCC  5.0 V  10, fCP 24 MHz, VSS  AVSS  0.0 V)

Note:

: If you change the power supply voltage too rapidly, a power on reset may occur. We recommend that you startup

smoothly by restraining voltages when changing the power supply voltage during operation, as shown in the figure below.

Perform while not using the PLL clock. However, if voltage drops are within 1 V/s, you can operate while using the PLL

clock.

11.4.4 Clock Output Timing

(TA  40°C to 105°C, VCC  5.0 V  10, VSS  0.0 V, fCP 24 MHz)

Parameter

Symbol

Condition

Value

Unit

Remarks

Min

Max

Power on rise time

VCC



0.05

Power off time

tOFF

VCC



Waiting time until power-on

Parameter

Symbol

Condition

Value

Unit

Remarks

Min

Max

Cycle time

tCYC

CLK



62.5



fCP  16 MHz

41.67



fCP  24 MHz

CLK

  CLK 

tCHCL

CLK



fCP  16 MHz



fCP  24 MHz

VCC

tOFF

2.7 V

0.2 V

VCC

VSS

3 V

Holds RAM data

We recommend a rise of

50 mV/ms maximum.

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