LM12438CIWM datasheet(10/80 Pages) NSC

10 / 80 page

20 Electrical Specifications (Continued)

23 DIGITAL SWITCHING CHARACTERISTICS

The following specifications apply to the LM12434 and LM12 L 438 for VAa

VDae 5V 33V

AGND e DGND e 0V CL (load capacitance) on output lines e 80 pF unless otherwise specified

Boldface limits apply for TA e TJ e TMIN to TMAX all other limits for TA e TJ e 25 C (Notes 6 7 and 9)

231 Standard Mode Interface (MICROWIREPLUSTM SCI and SPIQSPI)

Symbol

Parameter

Conditions

Typical

Limits

Units

(See

Figure Below)

(Note 10)

(Note 11)

(Limit)

SCLK (Serial Clock) Period

100 125

ns (min)

CS Set-Up Time to First

25 30

ns (min)

Clock Transition

DI Valid Set-Up Time to Data

ns (min)

Capture Transition of SCLK

DI Valid Hold Time to Data

ns (min)

Capture Transition of SCLK

DO Hold Time from Data Shift

70 120

ns (max)

Transition of SCLK

CS Hold Time from Last SCLK

Transition in a Read or Write Cycle

ns (min)

(Excluding Burst Read Cycle)

CS Inactive to CS Active Again

CLK Cycle

(min)

SCLK Idle Time between the

End of the Command Byte

CLK Cycle

Transfer and the Start of the

(min)

Data Transfer in Read Cycles

CLK is the main clock input to the device pin number 24 in PLCC package or pin number 2 in SO package

TLH11879 – 18

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