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MP2624GL Datasheet(PDF) 27 Page - Monolithic Power Systems

Part # MP2624GL
Description  I2C Controlled 4.5A Single Cell USB / Adaptor Charger with Narrow VDC Power Path Management USB OTG and Shipping Mode
PDF  45 Pages
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Manufacturer  MPS [Monolithic Power Systems]
Direct Link  http://www.monolithicpower.com
Logo MPS - Monolithic Power Systems

MP2624GL Datasheet(HTML) 27 Page - Monolithic Power Systems

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MP2624 – 4.5A SW CHARGER W/ I2C CONTROL, NVDC POWER PATH, USB OTG
MP2624 Rev.1.05
www.MonolithicPower.com
27
4/9/2018
MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.
© 2018 MPS. All Rights Reserved.
Boost Start -Up
Power the PMID Pin to 5V
Regulate the current at IIN _LMT + 300mA
Start the 3ms and 30ms Timer
VBUS > 4.6V?
Turn on the block switch
Yes
No
3ms timer expires ?
30ms timer expires?
Yes
Latch Off the block switch
Yes
Turn off block switch
Start 5ms timer
5ms timer expires ?
No
Yes
No
No
Figure 14: OTG Boost Start-Up Flow
OTG Boost Function
The MP2624 is able to supply a regulated 5V
output at IN for powering the peripherals
compliant with the USB On-The-Go specification.
The MP2624 will not enter the OTG mode if the
battery is below the battery UVLO threshold to
ensure that the battery is not drained. In order to
enable the OTG mode, the input voltage at IN
must be below 1.0V.
Boost operation can be enabled when REG01 Bit
[5:4] = 10/11 and OTG is high. The OTG output
current can be selected as 500mA or 1.3A via I2C
(REG02 Bit [1:0]). During boost mode, the status
register REG08 Bit [7:6] is set to 11.
Boost operation is enabled only when the
following conditions are met:
VBATT > VBATT_UVLO (rising 2.7V)
OTG
is
high,
and
REG01
Bit [5:4] =10/11
After a 200ms delay, boost mode is
enabled
VIN < 1V
Once OTG is enabled, if the voltage at VIN does
not go above the USB UVLO (4.65V) level within
30ms, the OTG fault will be asserted, and OTG
will be disabled until the host command is
executed, or OTG is toggled. Also, the MP2624
provides output short-circuit protection and
output over-voltage protection. In OTG mode, if
VIN falls below USB UVLO for more than 30ms,
an OTG fault will be asserted, and OTG will be
disabled until the host command is executed, or
OTG is toggled. Any fault during boost operation
sets the fault register REG09 Bit [6] to 1.
When both charging and OTG are enabled, the
OTG operation takes priority.
Figure 14 shows the OTG boost start-up time
sequence. Once OTG is enabled, the MP2624
will boost the PMID to 5.0V first. Then the block
FET is regulated linearly with the current limit of
IOLIM + 300mA. When the VIN_OTG is charged
higher than 4.6V within 6ms, the block FET is
turned on fully. Otherwise, PMID tries to charge
IN again after a 8ms off period. When the total
time hits 56ms, the OTG is turned off and will not
start again until the OTG mode is reset. When
the OTG output is in an OCP condition or short
condition, the output works the same process.



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