S29CD032G datasheet(34/93 Pages) SPANSION

Part #	S29CD032G

Description	CMOS 2.5 VOLT ONLY BURST MODE DUAL BOOT, SIMULTANEOUS READ /WRITE FLASH MEMORY

PDF	93 Pages

Scroll/Zoom	100%

Manufacturer	SPANSION [SPANSION]

Direct Link	http://www.spansion.com

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34 / 93 page

S29CD032G

30606B0 March 22, 2004

Ad va n c e

In f o rm a t i o n

Logical Inhibit

Write cycles are inhibited by holding any one of OE# = VIL, CE# = VIH, or WE#

= VIH. To initiate a write cycle, CE# and WE# must be a logical zero (VIL) while

OE# is a logical one (VIH).

Power-Up Write Inhibit

If WE# = CE# = VIL and OE# = VIH during power-up, the device does not accept

commands on the rising edge of WE#. The internal state machine is automatically

reset to reading array data on power-up.

VCC and VIO Power-up And Power-down Sequencing

The device imposes no restrictions on VCC and VIO power-up or power-down se-

quencing. Asserting RESET# to VIL is required during the entire VCC and VIO

power sequence until the respective supplies reach their operating voltages.

Once, VCC and VIO attain their respective operating voltages, de-assertion of RE-

SET# to VIH is permitted.

S29CD032G Datasheet(PDF) 34 Page - SPANSION