SCM-i.MX 6Dual/6Quad Datasheet for Consumer Products, Data Sheet: Technical Data, Rev. 0, 02/2016

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Freescale Semiconductor, Inc.

— 16/32-bit NOR Flash. All EIMv2 pins are muxed on other interfaces.

— 16/32-bit PSRAM, Cellular RAM

Each i.MX 6Dual/6Quad processor enables the following interfaces to external devices (some of them

are muxed and not available simultaneously):

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Hard Disk Drives—SATA II, 3.0 Gbps

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Displays—Total of five interfaces available. Total raw pixel rate of all interfaces is up to 450

Mpixels/sec, 24 bpp. Up to four interfaces may be active in parallel.

— One Parallel 24-bit display port, up to 225 Mpixels/sec (for example, WUXGA at 60 Hz

or dual HD1080 and WXGA at 60 Hz)

— LVDS serial ports—One port up to 165 Mpixels/sec or two ports up to 85 MP/sec (for

example, WUXGA at 60 Hz) each

— HDMI 1.4 port

— MIPI/DSI, two lanes at 1 Gbps

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Camera sensors:

— Parallel Camera port (up to 20 bit and up to 240 MHz peak)

— MIPI CSI-2 serial camera port, supporting up to 1000 Mbps/lane in 1/2/3-lane mode and

up to 800 Mbps/lane in 4-lane mode. The CSI-2 Receiver core can manage one clock lane

and up to four data lanes. Each i.MX 6Dual/6Quad processor has four lanes.

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Expansion cards:

— Four MMC/SD/SDIO card ports all supporting:

– 1-bit or 4-bit transfer mode specifications for SD and SDIO cards up to UHS-I

SDR-104 mode (104 MB/s max)

– 1-bit, 4-bit, or 8-bit transfer mode specifications for MMC cards up to 52 MHz in

both SDR and DDR modes (104 MB/s max)

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USB:

— One High Speed (HS) USB 2.0 OTG (Up to 480 Mbps), with integrated HS USB PHY

— Three USB 2.0 (480 Mbps) hosts:

– One HS host with integrated High Speed PHY

– Two HS hosts with integrated HS-IC USB (High Speed Inter-Chip USB) PHY

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Expansion PCI Express port (PCIe) v2.0 one lane:

— PCI Express (Gen 2.0) dual mode complex, supporting Root complex operations and

Endpoint operations. Uses x1 PHY configuration.

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Miscellaneous IPs and interfaces:

— SSI block capable of supporting audio sample frequencies up to 192 kHz stereo inputs

and outputs with I2S mode