SCM-i.MX 6Dual/6Quad Datasheet for Consumer Products, Data Sheet: Technical Data, Rev. 0, 02/2016

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Freescale Semiconductor, Inc.

3. Modules List

Table 3-1 Modules List

Block Name

Description/Notes

i.MX 6Dual/6Quad

Freescale i.MX 6Dual/6Quad Applications Processor. Fully functional as a normal i.MX

6Dual/6Quad except the MLB bus is disabled and not pinned out.

MMPF0100

Power management IC requires only a single supply and can provide power and voltage

references to entire SCM. Refer to section 4 for electrical details.

SPI NOR

16 megabytes of SPI NOR which is fully available for user programming.

LPDDR2 PoP Interface

Interface to support LPDDR2 (1GB or 2GB) in PoP configuration using a 12mm x 12mm

FBGA216 footprint.

Discrete Components

109 passives for decoupling capacitors and reference resistors.

Table 3-2 Recommended Memory

Part Number

Description

MT42L128M64D2LL-25

Micron LPDDR2, 1GB

MT42L256M64D4LL-25

Micron LPDDR2, 2GB

Note: Micron is the only recommended memory solution for SCM.

3.1. Special Signal Considerations

The figure below shows critical internal connections, pull-ups and pulldowns.

Figure 3. SCM-i.MX 6Dual/6Quad Critical Internal Connections

Note:

DDR_VREF is connected internally to the LPDDR2 memory through one of the PoP landing pads.