NT5CC64M16GP-DHT datasheet(9/160 Pages) NANYA

9 / 160 page

Version 2.2

Nanya Technology Cooperation ©

04/2019

NTC Proprietary

Level: Property

DDR3(L) 1Gb SDRAM

NT5CB(C)128M8GN / NT5CB(C)64M16GP

Symbol

Type

Function

REET

Input

Active Low Asynchronous Reset: Reset is active when REET is LOW, and inactive when

REET is HIGH. REET must be HIGH during normal operation. REET is a CMOS rail to rail

signal with DC high and low at 80% and 20% of VDD, i.e. 1.20V for DC high and 0.30V.

Input/output

Data Inputs/Output: Bi-directional data bus. DQ0 is the prime DQ in a low byte lane of

x4/x8/x16 configuration and DQ8 is the prime DQ in a high byte lane of x16 configuration for write

leveling.

For x8,

DQS, (

)

For x16,

DQSL,(

L),

DQSU,(

U)

Input/output

Data Strobe: output with read data, input with write data. Edge aligned with read data, centered

with write data. The data strobes DQS, DQSL, DQSU are paired with differential signals

,

L, U, respectively, to provide differential pair signaling to the system during both reads

and writes. DDR3 SDRAM supports differential data strobe only and does not support

single-ended. For the x16, DQSL corresponds to the data on DQL0-DQL7; DQSU corresponds to

the data on DQU0-DQU7

For x8,

TDQS, (

T)

Output

Termination Data Strobe: TDQS/T is applicable for X8 DRAMs only. When enabled via

Mode Register A11=1 in MR1, DRAM will enable the same termination resistance function on

TDQS/

T that is applied to DQS/. When disabled via mode register A11=0 in MR1,

DM/

T will provide the data mask function and T is not used. x16 DRAMs must disable the

TDQS function via mode register A11=0 in MR1.

No Connect: No internal electrical connection is present.

VDDQ

Supply

DQ Power Supply: 1.35V -0.067V/+0.1V or 1.5V ± 0.075V

VDD

Supply

Power Supply: 1.35V -0.067V/+0.1V or 1.5V ± 0.075V

VSSQ

Supply

DQ Ground

VSS

Supply

Ground

VREFCA

Supply

Reference voltage for CA

VREFDQ

Supply

Reference voltage for DQ

Supply

Reference pin for ZQ calibration.

Notes:

1. Input only pins (BA0-BA2, A0-A13,

RA, A, WE, , CKE, ODT, and REET) do not supply termination.

2. The signal may show up in a different symbol but it indicates the same thing. e.g., /CK = CK# =  = CKb, /DQS = DQS# =

 = DQSb, /CS = CS# =  = CSb.

NT5CC64M16GP-DHT Datasheet(PDF) 9 Page - Nanya Technology Corporation.

NT5CC64M16GP-DHT Datasheet(HTML) 9 Page - Nanya Technology Corporation.

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

Datasheet Download

Link URL