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NT5CB128M8GP-DHT Datasheet(PDF) 98 Page - Nanya Technology Corporation. |
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NT5CB128M8GP-DHT Datasheet(HTML) 98 Page - Nanya Technology Corporation. |
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98 / 160 page ![]() Version 2.2 98 Nanya Technology Cooperation © 04/2019 All Rights Reserved. NTC Proprietary Level: Property DDR3(L) 1Gb SDRAM NT5CB(C)128M8GN / NT5CB(C)64M16GP Single-ended requirements for differential signals Each individual component of a differential signal (CK, DQS, DQSL, DQSU, , ,L, or U) has also to comply with certain requirements for single-ended signals. CK and have to approximately reach VSEHmin / VSELmax (approximately equal to the ac-levels (VIH (ac) / VIL (ac)) for ADD/CMD signals) in every half-cycle. DQS, DQSL, DQSU, , L have to reach VSEHmin / VSELmax (approxi- mately the ac-levels (VIH (ac) / VIL (ac)) for DQ signals) in every half-cycle proceeding and following a valid transition. Note that the applicable ac- levels for ADD/CMD and DQ’s might be different per speed-bin etc. E.g., if VIH150 (ac)/VIL150(ac) is used for ADD/CMD signals, then these ac-levels apply also for the single ended signals CK and |
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