NT5CB128M8GP-EKB datasheet(127/160 Pages) NANYA

127 / 160 page

Version 2.2

127

Nanya Technology Cooperation ©

04/2019

NTC Proprietary

Level: Property

DDR3(L) 1Gb SDRAM

NT5CB(C)128M8GN / NT5CB(C)64M16GP

IDD5B

Burst Refresh Current

CKE: High; External clock: On;

tCK, CL, nRFC: see the table of Timings used for IDD and IDDQ;

BL: 8(1); AL: 0;

: High between REF;

Command, Address, Bank Address Inputs: partially toggling;

Data IO: MID-LEVEL;

DM:stable at 0;

Bank Activity: REF command every nRFC;

Output Buffer and RTT: Enabled in Mode Registers(2);

ODT Signal: stable at 0;

IDD6

Self Refresh Current: Normal Temperature Range

TCASE: Normal Temperature Range;

Auto Self-Refresh (ASR): Disabled(4);

Self-Refresh Temperature Range (SRT):Normal(5);

CKE: Low; External clock: Off;

CK and

: LOW; CL: see the table of Timings used for IDD and IDDQ;

BL: 8(1);AL: 0;

, Command, Address, Bank Address, Data IO: MID-LEVEL;

DM:stable at 0;

Bank Activity:Self-Refresh operation;

Output Buffer and RTT: Enabled in Mode Registers(2);

ODT Signal: MID-LEVEL

IDD6ET

Self-Refresh Current: Extended Temperature Range (6)

TCASE: Extended Temperature Range;

Auto Self-Refresh (ASR): Disabled(4);

Self-Refresh Temperature Range (SRT):Extended(5);

CKE: Low; External clock: Off; CK and

: LOW; CL: see the table of Timings used for IDD and IDDQ;

BL: 8(1);AL: 0;

, Command, Address, Bank Address, Data IO: MID-LEVEL;

DM:stable at 0;

Bank Activity:Extended Temperature Self-Refresh operation;

Output Buffer and RTT: Enabled in Mode Registers(2);

ODT Signal: MID-LEVEL

IDD6TC

Auto Self-Refresh Current (6)

Auto Self-Refresh (ASR): Enabled(4);

Self-Refresh Temperature Range (SRT):Normal(5);

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