NT5CC128M8GP-EKB datasheet(57/160 Pages) NANYA

57 / 160 page

Version 2.2

Nanya Technology Cooperation ©

04/2019

NTC Proprietary

Level: Property

DDR3(L) 1Gb SDRAM

NT5CB(C)128M8GN / NT5CB(C)64M16GP

Write Timing Definition

Note:

1. BL=8, WL=5 (AL=0, CWL=5).

2. Din n = data in from column n.

3. NOP commands are shown for ease of illustration; other command may be valid at these times.

4. BL8 setting activated by either MR0 [A1:0=00] or MR0 [A1:0=01] and A12 = 1 during WRITE command at T0.

5. tDQSS must be met at each rising clock edge.

NOP

CMD

NOP

Address

NOP

WL = AL + CWL

NOP

Din

n +6

Din

n +7

Din

n +1

Din

n +2

Din

n +3

Din

n +4

Din

n +5

Din

tDQSS tDSH

tDQSL

tDSS

tWPST(min)

tDQSL(min)

tDSS

tDSH

tDQSH

tDQSL

tDSS

tDQSH

tWPRE(min)

tDSS

tDSH

tDQSH

tDSH

tDSS

Din

n +6

Din

n +7

Din

n +1

Din

n +2

Din

n +3

Din

n +4

Din

n +5

Din

tDSH

tDQSH

tDSH

tDQSH

tDSH

NOP

tDQSH

tWPRE(min)

Write

Bank

Col n

tWPRE(min)

tDQSH

NOP

tDSS

tDQSL

tDSS

NOP

tDSH

Din

n +6

Din

n +7

Din

n +1

Din

n +2

Din

n +3

Din

n +4

Din

n +5

Din

tDQSH

tDSH

NOP

tDSS

tDQSL(min)

tWPST(min)

tDQSL(min)

tWPST(min)

tDQSS

DQS, DQS

(tDQSS min)

DQS, DQS

(tDQSS nominal)

DQS, DQS

(tDQSS max)

NT5CC128M8GP-EKB Datasheet(PDF) 57 Page - Nanya Technology Corporation.

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