PCI6621 datasheet(75/204 Pages) TI

75 / 204 page

3−27

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Serial bus control/status register (PCI offset B3h, see Section 4.50): bits 7, 3−0

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ExCA identification and revision register (ExCA 800h/840h, see Section 5.1): bits 7−0

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ExCA global control register (ExCA 81Eh/85Eh, see Section 5.20): bits 2−0

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CardBus socket power management register (CardBus 20h, see Section 6.6): bits 25, 24

The global reset-only (function 3) register bits:

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Subsystem vendor ID register (PCI offset 2Ch, see Section 7.9): bits 15–0

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Subsystem ID register (PCI offset 2Eh, see Section 7.10): bits 15–0

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Power management control and status register (PCI offset 48h, see Section 7.18): bits 15, 8, 1, 0

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General control register (PCI offset 4Ch, see Section 7.21): bits 6−4, 2–0

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Diagnostic register (PCI offset 54h, see Section 7.23): bits 31–0

The global reset-only (function 4) register bits:

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Subsystem vendor ID register (PCI offset 2Ch, see Section 8.9): bits 15–0

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Subsystem ID register (PCI offset 2Eh, see Section 8.10): bits 15–0

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Power management control and status register (PCI offset 84h, see Section 8.19): bits 15, 8, 1, 0

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General control register (PCI offset 88h, see Section 8.22): bits 6−4, 0

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Diagnostic register (PCI offset 90h, see Section 8.24): bits 31–0

The global reset-only (function 5) register bits:

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Subsystem vendor ID register (PCI offset 2Ch, see Section 9.10): bits 15–0

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Subsystem ID register (PCI offset 2Eh, see Section 9.11): bits 15–0

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Power management control and status register (PCI offset 48h, see Section 9.19): bits 15, 8, 1, 0

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General control register (PCI offset 4Ch, see Section 9.22): bits 6−4, 0

PCI6621 Datasheet(PDF) 75 Page - Texas Instruments